Lines Matching +full:suspend +full:- +full:to +full:- +full:ram
1 # SPDX-License-Identifier: GPL-2.0-only
9 This option allows to enable specific memory controller drivers,
12 vary from memory tuning and frequency scaling to enabling
13 access to attached peripherals through memory bus.
42 Used to configure the EBI (external bus interface) when the device-
51 This driver provides access to the DPFE interface of Broadcom
53 provide current information about the system's RAM, for instance
55 for the DRAM's temperature. Slower refresh rate means cooler RAM,
56 higher refresh rate means hotter RAM.
63 This driver provides a way to configure the Broadcom STB memory
68 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
72 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
73 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
74 possible to tune the L2 cache performance up by setting the data,
75 tags and way-select latencies of RAM access. This driver provides a
76 dt properties-based and sysfs interface for it.
85 is intended to provide a glue-less interface to a variety of
99 functions of the driver includes re-configuring AC timing
111 interfacing to a variety of asynchronous as well as synchronous
118 Enables verbose debugging mostly to decode the bootloader provided
119 timings. To preserve the bootloader provided timings, the reset
120 of GPMC is skipped during init. Enable this during development to
121 configure devices connected to the GPMC bus.
123 NOTE: In addition to matching the register setup with the bootloader
124 you also need to match the GPMC FCLK frequency used by the
135 the EMIF PM code must run from on-chip SRAM late in the suspend
137 for the SoC PM code to use.
144 FPGA Device Feature List (DFL) framework. It is used to expose
156 Armada 370 and Armada XP. This controller allows to handle flash
164 Coherency Fabric. Errors reported include accesses to
180 the Ingenic JZ4780. This controller is used to handle external
196 Texas Instruments da8xx SoCs. It's used to tweak various memory
209 tristate "Renesas RPC-IF driver"
214 This supports Renesas R-Car Gen3 or RZ/G2 RPC-IF which provides
215 either SPI host or HyperFlash. You'll have to select individual
223 Select this option to enable the STM32 FMC2 External Bus Interface
234 - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
236 - OSPI1 and OSPI2 are multiplexed over the same output port 1
237 - swapped mode (no multiplexing), OSPI1 output is on port 2,
239 - OSPI1 and OSPI2 are multiplexed over the same output port 2
241 - the split of the memory area shared between the 2 OSPI instances.
242 - chip select selection override.
243 - the time between 2 transactions in multiplexed mode.