Lines Matching +full:no +full:- +full:reset +full:- +full:on +full:- +full:init
1 # SPDX-License-Identifier: GPL-2.0-only
10 useful mostly on embedded systems. These could be controllers
27 depends on ARM_AMBA && OF
36 depends on ARCH_AT91 || COMPILE_TEST
37 depends on OF
42 Used to configure the EBI (external bus interface) when the device-
49 depends on ARCH_BRCMSTB || COMPILE_TEST
52 STB SoCs. The firmware running on the DCPU inside the DDR PHY can
61 depends on ARCH_BRCMSTB || COMPILE_TEST
68 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
69 depends on MIPS_BAIKAL_T1 || COMPILE_TEST
72 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
73 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
75 tags and way-select latencies of RAM access. This driver provides a
76 dt properties-based and sysfs interface for it.
80 depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
81 depends on OF
85 is intended to provide a glue-less interface to a variety of
92 depends on ARCH_OMAP2PLUS || COMPILE_TEST
96 SoCs. EMIF is an SDRAM controller that, based on its revision,
99 functions of the driver includes re-configuring AC timing
105 depends on OF_ADDRESS
106 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
110 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
115 bool "Enable GPMC debug output and skip reset of GPMC during init"
116 depends on OMAP_GPMC
119 timings. To preserve the bootloader provided timings, the reset
120 of GPMC is skipped during init. Enable this during development to
130 depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST)
131 depends on SRAM
133 This driver is for the EMIF module available on Texas Instruments
135 the EMIF PM code must run from on-chip SRAM late in the suspend
141 depends on FPGA_DFL && HAS_IOMEM
151 depends on PLAT_ORION || COMPILE_TEST
152 depends on OF
161 depends on FSL_SOC_BOOKE || COMPILE_TEST
165 physical addresses that mapped by no local access window
171 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
172 depends on HAS_IOMEM
176 depends on MIPS || COMPILE_TEST
177 depends on HAS_IOMEM && OF
185 depends on ARCH_MEDIATEK || COMPILE_TEST
193 depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
195 This driver is for the DDR2/mDDR Memory Controller present on
202 depends on ARM || COMPILE_TEST
203 depends on ARM_AMBA
209 tristate "Renesas RPC-IF driver"
210 depends on ARCH_RENESAS || COMPILE_TEST
214 This supports Renesas R-Car Gen3 or RZ/G2 RPC-IF which provides
219 tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
220 depends on ARCH_STM32 || COMPILE_TEST
225 devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
230 depends on SPI_STM32_OSPI || COMPILE_TEST
234 - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
235 output is on port 2
236 - OSPI1 and OSPI2 are multiplexed over the same output port 1
237 - swapped mode (no multiplexing), OSPI1 output is on port 2,
238 OSPI2 output is on port 1
239 - OSPI1 and OSPI2 are multiplexed over the same output port 2
241 - the split of the memory area shared between the 2 OSPI instances.
242 - chip select selection override.
243 - the time between 2 transactions in multiplexed mode.