Lines Matching refs:CCI_REG8

23 #define OV4689_REG_CTRL_MODE		CCI_REG8(0x0100)
61 #define OV4689_REG_TIMING_FORMAT1 CCI_REG8(0x3820) /* Vertical */
62 #define OV4689_REG_TIMING_FORMAT2 CCI_REG8(0x3821) /* Horizontal */
78 #define OV4689_REG_VFIFO_CTRL_01 CCI_REG8(0x4601)
87 #define OV4689_REG_TEST_PATTERN CCI_REG8(0x5040)
160 { CCI_REG8(0x0103), 0x01 }, /* SC_CTRL0103 software_reset = 1 */
161 { CCI_REG8(0x3000), 0x20 }, /* SC_CMMN_PAD_OEN0 FSIN_output_enable = 1 */
162 { CCI_REG8(0x3021), 0x03 }, /*
168 { CCI_REG8(0x3503), 0x04 }, /* AEC_MANUAL gain_input_as_sensor_gain_format = 1 */
171 { CCI_REG8(0x3603), 0x40 },
172 { CCI_REG8(0x3604), 0x02 },
173 { CCI_REG8(0x3609), 0x12 },
174 { CCI_REG8(0x360c), 0x08 },
175 { CCI_REG8(0x360f), 0xe5 },
176 { CCI_REG8(0x3608), 0x8f },
177 { CCI_REG8(0x3611), 0x00 },
178 { CCI_REG8(0x3613), 0xf7 },
179 { CCI_REG8(0x3616), 0x58 },
180 { CCI_REG8(0x3619), 0x99 },
181 { CCI_REG8(0x361b), 0x60 },
182 { CCI_REG8(0x361e), 0x79 },
183 { CCI_REG8(0x3634), 0x10 },
184 { CCI_REG8(0x3635), 0x10 },
185 { CCI_REG8(0x3636), 0x15 },
186 { CCI_REG8(0x3646), 0x86 },
187 { CCI_REG8(0x364a), 0x0b },
190 { CCI_REG8(0x3700), 0x17 },
191 { CCI_REG8(0x3701), 0x22 },
192 { CCI_REG8(0x3703), 0x10 },
193 { CCI_REG8(0x370a), 0x37 },
194 { CCI_REG8(0x3706), 0x63 },
195 { CCI_REG8(0x3709), 0x3c },
196 { CCI_REG8(0x370c), 0x30 },
197 { CCI_REG8(0x3710), 0x24 },
198 { CCI_REG8(0x3720), 0x28 },
199 { CCI_REG8(0x3729), 0x7b },
200 { CCI_REG8(0x372b), 0xbd },
201 { CCI_REG8(0x372c), 0xbc },
202 { CCI_REG8(0x372e), 0x52 },
203 { CCI_REG8(0x373c), 0x0e },
204 { CCI_REG8(0x373e), 0x33 },
205 { CCI_REG8(0x3743), 0x10 },
206 { CCI_REG8(0x3744), 0x88 },
207 { CCI_REG8(0x3745), 0xc0 },
208 { CCI_REG8(0x374c), 0x00 },
209 { CCI_REG8(0x374e), 0x23 },
210 { CCI_REG8(0x3751), 0x7b },
211 { CCI_REG8(0x3753), 0xbd },
212 { CCI_REG8(0x3754), 0xbc },
213 { CCI_REG8(0x3756), 0x52 },
214 { CCI_REG8(0x376b), 0x20 },
215 { CCI_REG8(0x3774), 0x51 },
216 { CCI_REG8(0x3776), 0xbd },
217 { CCI_REG8(0x3777), 0xbd },
218 { CCI_REG8(0x3781), 0x18 },
219 { CCI_REG8(0x3783), 0x25 },
220 { CCI_REG8(0x3798), 0x1b },
223 { CCI_REG8(0x3819), 0x01 }, /* VSYNC_END_L vsync_end_point[7:0] = 0x01 */
226 { CCI_REG8(0x3d85), 0x36 }, /* OTP_REG85 OTP_power_up_load_setting_enable = 1,
230 { CCI_REG8(0x3d8c), 0x71 }, /* OTP_SETTING_STT_ADDRESS_H */
231 { CCI_REG8(0x3d8d), 0xcb }, /* OTP_SETTING_STT_ADDRESS_L */
234 { CCI_REG8(0x4001), 0x40 }, /* DEBUG_MODE */
235 { CCI_REG8(0x401b), 0x00 }, /* DEBUG_MODE */
236 { CCI_REG8(0x401d), 0x00 }, /* DEBUG_MODE */
237 { CCI_REG8(0x401f), 0x00 }, /* DEBUG_MODE */
240 { CCI_REG8(0x4500), 0x6c }, /* ADC_SYNC_CTRL */
241 { CCI_REG8(0x4503), 0x01 }, /* ADC_SYNC_CTRL */
244 { CCI_REG8(0x4d00), 0x04 }, /* TPM_CTRL_00 tmp_slope[15:8] = 0x04 */
245 { CCI_REG8(0x4d01), 0x42 }, /* TPM_CTRL_01 tmp_slope[7:0] = 0x42 */
246 { CCI_REG8(0x4d02), 0xd1 }, /* TPM_CTRL_02 tpm_offset[31:24] = 0xd1 */
247 { CCI_REG8(0x4d03), 0x93 }, /* TPM_CTRL_03 tpm_offset[23:16] = 0x93 */
248 { CCI_REG8(0x4d04), 0xf5 }, /* TPM_CTRL_04 tpm_offset[15:8] = 0xf5 */
249 { CCI_REG8(0x4d05), 0xc1 }, /* TPM_CTRL_05 tpm_offset[7:0] = 0xc1 */
252 { CCI_REG8(0x5050), 0x0c }, /* DEBUG_MODE */
255 { CCI_REG8(0x5501), 0x10 }, /* OTP_DPC_START_L otp_start_address[7:0] = 0x10 */
256 { CCI_REG8(0x5503), 0x0f }, /* OTP_DPC_END_L otp_end_address[7:0] = 0x0f */