Lines Matching +full:soc +full:- +full:controller

1 # SPDX-License-Identifier: GPL-2.0-only
6 	  on-chip processors through queued messages and interrupt driven
15 	  Say Y here if you want to build the ARM MHU controller driver.
16 	  The controller has 3 mailbox channels, the last of which can be
23 	  Say Y here if you want to build the ARM MHUv2 controller driver,
32 	  Say Y here if you want to build the ARM MHUv3 controller driver,
37 	  will be discovered and possibly managed at probe-time.
51 	  controller driver.
52 	  The controller has a maximum of 3 mailbox channels, the last of
71 	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
72 	  SOC. Say Y here if you are building for such a device (for example
85 	bool "Rockchip Soc Integrated Mailbox Support"
88 	  This driver provides support for inter-processor communication
90 	  Please check it that the Soc you use have Mailbox hardware.
137 	  multiple processors within the SoC. Select this driver if your
148 	  Y here if you want to use Hi3660 mailbox controller.
158 	  build Hi6220 mailbox controller driver.
165 	  Test client to help with testing new Controller driver
169 	tristate "PolarFire SoC (MPFS) Mailbox"
174 	  This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
177 	  module will be called mailbox-mpfs.
186 	  providing an interface for invoking the inter-process communication
199 	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
202 	  An implementation of the APM X-Gene Interprocessor Communication
203 	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
204 	  It is used to send short messages between ARM64-bit cores and
206 	  want to use the APM X-Gene SLIMpro IPCM support.
232 	  with hardware for Inter-Processor Communication Controller (IPCC)
236 	tristate "MediaTek ADSP Mailbox Controller"
239           Say yes here to add support for "MediaTek ADSP Mailbox Controller.
279 	  you want to build the Spreatrum mailbox controller driver.
286 	  controller driver enables communication between AP and CPUCP. Say
293 	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller
296 	  acts as an interrupt controller for receiving interrupts from clients.
300 	tristate "T-head TH1520 Mailbox"
303 	  Mailbox driver implementation for the Thead TH-1520 platform. Enables
304 	  two cores within the SoC to communicate and coordinate by passing