Lines Matching +full:power +full:- +full:manager

1 # SPDX-License-Identifier: GPL-2.0-only
6 	  on-chip processors through queued messages and interrupt driven
37 	  will be discovered and possibly managed at probe-time.
45 	  processer can write data in a channel, and set co-responding register
92 	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
109 	  This driver provides support for inter-processor communication
122 	  RAS (ACPI reliability protocol) and MPST (ACPI Memory power
150 	tristate "Texas Instruments Message Manager Driver"
154 	  An implementation of Message Manager slave driver for Keystone
155 	  and K3 architecture SoCs from Texas Instruments. Message Manager
198 	  module will be called mailbox-mpfs.
203 	tristate "Microchip Inter-processor Communication (IPC) SBI driver"
208 	  Inter-process communication (IPC) controller.
211 	  module will be called mailbox-mchp-ipc-sbi.
220 	  providing an interface for invoking the inter-process communication
233 	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
236 	  An implementation of the APM X-Gene Interprocessor Communication
237 	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
238 	  It is used to send short messages between ARM64-bit cores and
240 	  want to use the APM X-Gene SLIMpro IPCM support.
246 	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
257 	  Mailbox implementation of the Broadcom FlexRM ring manager,
266 	  with hardware for Inter-Processor Communication Controller (IPCC)
305 	  between the application CPUs and the power management coprocessor.
327 	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller
334 	tristate "T-head TH1520 Mailbox"
337 	  Mailbox driver implementation for the Thead TH-1520 platform. Enables
340 	  kernel is running, and E902 core used for power management among other