Lines Matching +full:mpfs +full:- +full:can

1 # SPDX-License-Identifier: GPL-2.0-only
6 	  on-chip processors through queued messages and interrupt driven
16 	  The controller has 3 mailbox channels, the last of which can be
35 	  ARM MHUv3 controllers can implement a varying number of extensions
37 	  will be discovered and possibly managed at probe-time.
53 	  which can be used in Secure mode only.
71 	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
88 	  This driver provides support for inter-processor communication
169 	tristate "PolarFire SoC (MPFS) Mailbox"
174 	  This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
177 	  module will be called mailbox-mpfs.
186 	  providing an interface for invoking the inter-process communication
199 	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
202 	  An implementation of the APM X-Gene Interprocessor Communication
203 	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
204 	  It is used to send short messages between ARM64-bit cores and
206 	  want to use the APM X-Gene SLIMpro IPCM support.
232 	  with hardware for Inter-Processor Communication Controller (IPCC)
293 	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller
300 	tristate "T-head TH1520 Mailbox"
303 	  Mailbox driver implementation for the Thead TH-1520 platform. Enables