Lines Matching +full:lpc +full:- +full:interrupts

1 # SPDX-License-Identifier: GPL-2.0-only
116 	tristate "Broadcom BCM2712 MSI-X Interrupt Peripheral support"
125 	  Enable support for the Broadcom BCM2712 MSI-X target peripheral
126 	  (MIP) needed by brcmstb PCIe to handle MSI-X interrupts on
138 	tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
146 	tristate "Broadcom STB 7120-style L2 interrupt controller driver"
202 	  maps the internal interrupts sources to PCIe interrupt.
205 	  will be called irq-lan966x-oic.
246 	bool "J-Core integrated AIC" if COMPILE_TEST
250 	  Support for the J-Core integrated AIC.
261 	  interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
264 	bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
269 	  devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
276 	  to 8 external interrupts with configurable sense select.
326 	tristate "TS-4800 IRQ controller"
331 	  Support for the TS-4800 FPGA IRQ controller
361 	  a free irq and configures the IP. Thus the peripheral interrupts are
390 	  Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
442 	tristate "STM32MP extended interrupts and event controller"
448 	  Support STM32MP EXTI (extended interrupts and event) controller.
509 	  Say yes here to enable C-SKY SMP interrupt controller driver used
510 	  for C-SKY SMP system.
515 	bool "C-SKY APB Interrupt Controller"
518 	  Say yes here to enable C-SKY APB interrupt controller driver used
519 	  by C-SKY single core SOC system. It uses mmio map apb-bus to visit
548 	  CPU-to-CPU MSI controller. This requires a specially crafted DT
554 	bool "Loongson-1 Interrupt Controller"
560 	  Support for the Loongson-1 platform Interrupt Controller.
591 	  This enables support for the PRU-ICSS Local Interrupt Controller
592 	  present within a PRU-ICSS subsystem present on various TI SoCs.
593 	  The PRUSS INTC enables various interrupts to be routed to multiple
638 	bool "THEAD C9XX ACLINT S-mode IPI Interrupt Controller"
644 	  This enables support for T-HEAD specific ACLINT SSWI device
670 	  Documentation/arch/loongarch/irq-chip-model.rst.
698 	  Support for the Loongson-3 HyperTransport PIC Controller.
729 	bool "Loongson PCH LPC Controller"
735 	  Support for the Loongson PCH LPC Controller.
783 	  This on-chip interrupt controller enables MSI sources to be
791 	  SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
792 	  chained controller, routing all interrupt source in P-Chip to
793 	  the primary controller on C-Chip.