Lines Matching +full:external +full:- +full:irqs
1 # SPDX-License-Identifier: GPL-2.0-only
131 tristate "Broadcom BCM2712 MSI-X Interrupt Peripheral support"
140 Enable support for the Broadcom BCM2712 MSI-X target peripheral
141 (MIP) needed by brcmstb PCIe to handle MSI-X interrupts on
153 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
161 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
220 will be called irq-lan966x-oic.
261 bool "J-Core integrated AIC" if COMPILE_TEST
265 Support for the J-Core integrated AIC.
272 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
275 Enable support for the Renesas Interrupt Controller for external
276 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
279 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
283 Enable support for the Renesas Interrupt Controller for external
284 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
291 to 8 external interrupts with configurable sense select.
299 for external devices.
321 Enables SysCfg Controlled IRQs on STi based platforms.
341 tristate "TS-4800 IRQ controller"
346 Support for the TS-4800 FPGA IRQ controller
414 Enables the wakeup IRQs for IMX platforms with GPCv2 block
510 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
519 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
525 Say yes here to enable C-SKY SMP interrupt controller driver used
526 for C-SKY SMP system.
531 bool "C-SKY APB Interrupt Controller"
534 Say yes here to enable C-SKY APB interrupt controller driver used
535 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
564 CPU-to-CPU MSI controller. This requires a specially crafted DT
570 bool "Loongson-1 Interrupt Controller"
576 Support for the Loongson-1 platform Interrupt Controller.
607 This enables support for the PRU-ICSS Local Interrupt Controller
608 present within a PRU-ICSS subsystem present on various TI SoCs.
643 bool "StarFive JH8100 External Interrupt Controller"
654 bool "RISC-V ACLINT S-mode IPI Interrupt Controller"
660 This enables support for variants of the RISC-V ACLINT-SSWI device.
662 - T-HEAD, with compatible "thead,c900-aclint-sswi"
663 - MIPS P8700, with compatible "mips,p8700-aclint-sswi"
693 Documentation/arch/loongarch/irq-chip-model.rst.
721 Support for the Loongson-3 HyperTransport PIC Controller.
790 bool "Microchip External Interrupt Controller"
795 Support for Microchip External Interrupt Controller.
806 This on-chip interrupt controller enables MSI sources to be
814 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
815 chained controller, routing all interrupt source in P-Chip to
816 the primary controller on C-Chip.