Lines Matching +full:chip +full:- +full:select
1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
11 select IRQ_DOMAIN_HIERARCHY
12 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
17 select ARM_GIC
28 select ARM_GIC
29 select IRQ_MSI_LIB
30 select PCI_MSI
37 select IRQ_DOMAIN_HIERARCHY
38 select PARTITION_PERCPU
39 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
40 select HAVE_ARM_SMCCC_DISCOVERY
44 select GENERIC_MSI_IRQ
45 select IRQ_MSI_LIB
56 select IRQ_DOMAIN_HIERARCHY
57 select GENERIC_IRQ_CHIP
61 select IRQ_DOMAIN
77 select GENERIC_IRQ_CHIP
78 select PCI_MSI if PCI
79 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
84 select PCI_MSI
85 select GENERIC_IRQ_CHIP
91 select GENERIC_IRQ_CHIP
92 select IRQ_DOMAIN
98 select GENERIC_IRQ_CHIP
99 select IRQ_DOMAIN
100 select SPARSE_IRQ
104 select GENERIC_IRQ_CHIP
105 select IRQ_DOMAIN
106 select SPARSE_IRQ
110 select IRQ_DOMAIN
114 select GENERIC_IRQ_CHIP
115 select IRQ_DOMAIN
116 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
122 select GENERIC_IRQ_CHIP
123 select IRQ_DOMAIN
124 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
130 select GENERIC_IRQ_CHIP
131 select IRQ_DOMAIN
137 select GENERIC_IRQ_CHIP
138 select IRQ_DOMAIN
142 select GENERIC_IRQ_CHIP
143 select IRQ_DOMAIN
147 select GENERIC_IRQ_CHIP
148 select IRQ_DOMAIN_HIERARCHY
152 select IRQ_DOMAIN
153 select SPARSE_IRQ
157 select ARM_GIC_V3
158 select ARM_GIC_V3_ITS
162 select GENERIC_IRQ_CHIP
163 select IRQ_DOMAIN
167 select IRQ_DOMAIN
168 select SPARSE_IRQ
172 select GENERIC_IRQ_CHIP
173 select IRQ_DOMAIN
180 will be called irq-lan966x-oic.
187 select GENERIC_IRQ_CHIP
188 select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
189 select IRQ_DOMAIN
190 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
195 select IRQ_DOMAIN
196 select SPARSE_IRQ
204 select IRQ_DOMAIN
208 select GENERIC_IRQ_CHIP
209 select IRQ_DOMAIN
213 select IRQ_DOMAIN
217 select GENERIC_IRQ_CHIP
218 select IRQ_DOMAIN
221 bool "J-Core integrated AIC" if COMPILE_TEST
223 select IRQ_DOMAIN
225 Support for the J-Core integrated AIC.
229 select IRQ_DOMAIN
233 select IRQ_DOMAIN
236 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
239 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
240 select GENERIC_IRQ_CHIP
241 select IRQ_DOMAIN
244 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
248 select IRQ_DOMAIN_HIERARCHY
251 to 8 external interrupts with configurable sense select.
255 select GENERIC_IRQ_CHIP
256 select IRQ_DOMAIN_HIERARCHY
264 select REGMAP_IRQ
271 select REGMAP
272 select MFD_SYSCON
281 select IRQ_DOMAIN_HIERARCHY
282 select IRQ_FASTEOI_HIERARCHY_HANDLERS
286 select GENERIC_IRQ_CHIP
290 select IRQ_DOMAIN
291 select GENERIC_IRQ_CHIP
294 tristate "TS-4800 IRQ controller"
295 select IRQ_DOMAIN
299 Support for the TS-4800 FPGA IRQ controller
303 select IRQ_DOMAIN
312 select IRQ_DOMAIN
313 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
318 select IRQ_DOMAIN
341 select GENERIC_IRQ_IPI if SMP
342 select IRQ_DOMAIN_HIERARCHY
343 select MIPS_CM
354 select MFD_SYSCON
355 select GENERIC_IRQ_CHIP
364 select IRQ_DOMAIN
370 select IRQ_DOMAIN
371 select STMP_DEVICE
375 select IRQ_DOMAIN
376 select GENERIC_IRQ_CHIP
379 select IRQ_MSI_LIB
387 select IRQ_MSI_LIB
388 select GENERIC_MSI_IRQ
398 select MFD_SYSCON
411 select IRQ_DOMAIN_HIERARCHY
412 select GENERIC_IRQ_CHIP
418 select IRQ_DOMAIN
419 select GENERIC_IRQ_CHIP
424 select IRQ_DOMAIN_HIERARCHY
433 select IRQ_DOMAIN_HIERARCHY
441 select IRQ_DOMAIN_HIERARCHY
448 select GENERIC_IRQ_CHIP
449 select IRQ_DOMAIN
457 select IRQ_DOMAIN_HIERARCHY
466 select IRQ_DOMAIN_HIERARCHY
475 Say yes here to enable C-SKY SMP interrupt controller driver used
476 for C-SKY SMP system.
481 bool "C-SKY APB Interrupt Controller"
484 Say yes here to enable C-SKY APB interrupt controller driver used
485 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
492 select IRQ_DOMAIN
499 select IRQ_DOMAIN
508 select IRQ_DOMAIN
509 select IRQ_DOMAIN_HIERARCHY
510 select GENERIC_MSI_IRQ
511 select IRQ_MSI_LIB
514 CPU-to-CPU MSI controller. This requires a specially crafted DT
520 bool "Loongson-1 Interrupt Controller"
523 select IRQ_DOMAIN
524 select GENERIC_IRQ_CHIP
526 Support for the Loongson-1 platform Interrupt Controller.
531 select IRQ_DOMAIN_HIERARCHY
541 select IRQ_DOMAIN_HIERARCHY
542 select TI_SCI_INTA_MSI_DOMAIN
553 select IRQ_DOMAIN
555 This enables support for the PRU-ICSS Local Interrupt Controller
556 present within a PRU-ICSS subsystem present on various TI SoCs.
563 select IRQ_DOMAIN_HIERARCHY
568 select IRQ_DOMAIN_HIERARCHY
573 select GENERIC_MSI_IRQ
579 select IRQ_DOMAIN_HIERARCHY
580 select GENERIC_IRQ_MATRIX_ALLOCATOR
581 select GENERIC_MSI_IRQ
593 select IRQ_DOMAIN_HIERARCHY
594 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
600 select IRQ_DOMAIN_HIERARCHY
602 This enables support for the INTC chip found in StarFive JH8100
616 select GENERIC_IRQ_CHIP
617 select IRQ_DOMAIN
618 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
619 select LOONGSON_HTVEC
620 select LOONGSON_LIOINTC
621 select LOONGSON_EIOINTC
622 select LOONGSON_PCH_PIC
623 select LOONGSON_PCH_MSI
624 select LOONGSON_PCH_LPC
627 irq chip hierarchy on LoongArch platforms please read the document
628 Documentation/arch/loongarch/irq-chip-model.rst.
634 select IRQ_DOMAIN
635 select GENERIC_IRQ_CHIP
644 select IRQ_DOMAIN_HIERARCHY
645 select GENERIC_IRQ_CHIP
653 select IRQ_DOMAIN
654 select GENERIC_IRQ_CHIP
656 Support for the Loongson-3 HyperTransport PIC Controller.
662 select IRQ_DOMAIN_HIERARCHY
670 select IRQ_DOMAIN_HIERARCHY
671 select IRQ_FASTEOI_HIERARCHY_HANDLERS
680 select IRQ_DOMAIN_HIERARCHY
681 select IRQ_MSI_LIB
682 select PCI_MSI
691 select IRQ_DOMAIN_HIERARCHY
699 select IRQ_DOMAIN
700 select IRQ_DOMAIN_HIERARCHY
712 select GENERIC_IRQ_CHIP
713 select IRQ_DOMAIN
719 select GENERIC_IRQ_IPI_MUX
727 select IRQ_DOMAIN
728 select IRQ_DOMAIN_HIERARCHY
737 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
738 chained controller, routing all interrupt source in P-Chip to
739 the primary controller on C-Chip.