Lines Matching +full:loc +full:- +full:code
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
35 * This file contains all of the code that is specific to the SerDes
98 static int qib_sd7220_reg_mod(struct qib_devdata *dd, int sdnum, u32 loc,
100 static int ibsd_mod_allchnls(struct qib_devdata *dd, int loc, int val,
117 * Below keeps track of whether the "once per power-on" initialization has
118 * been done, because uC code Version 1.32.17 or higher allows the uC to
121 * actual uC code having been loaded.
126 struct qib_devdata *dd = ppd->dd; in qib_ibsd_ucode_loaded()
128 if (!dd->cspec->serdes_first_init_done && in qib_ibsd_ucode_loaded()
130 dd->cspec->serdes_first_init_done = 1; in qib_ibsd_ucode_loaded()
131 return dd->cspec->serdes_first_init_done; in qib_ibsd_ucode_loaded()
147 /* clear, then re-enable parity errs */ in qib_sd7220_clr_ibpar()
168 * to be re-synchronized, between the host and the uC.
178 u32 loc; in qib_resync_ibepb() local
180 ret = -1; in qib_resync_ibepb()
183 loc = IB_PGUDP(chn); in qib_resync_ibepb()
184 ret = qib_sd7220_reg_mod(dd, IB_7220_SERDES, loc, 0, 0); in qib_resync_ibepb()
192 ret = qib_sd7220_reg_mod(dd, IB_7220_SERDES, loc, pat, 0xFF); in qib_resync_ibepb()
197 ret = qib_sd7220_reg_mod(dd, IB_7220_SERDES, loc, 0, 0); in qib_resync_ibepb()
199 qib_dev_err(dd, "Failed re-read in resync\n"); in qib_resync_ibepb()
206 loc = IB_CMUDONE(chn); in qib_resync_ibepb()
207 ret = qib_sd7220_reg_mod(dd, IB_7220_SERDES, loc, 0, 0); in qib_resync_ibepb()
239 spin_lock_irqsave(&dd->cspec->sdepb_lock, flags); in qib_ibsd_reset()
244 dd->cspec->hwerrmask & in qib_ibsd_reset()
251 epb_access(dd, IB_7220_SERDES, -1); in qib_ibsd_reset()
252 spin_unlock_irqrestore(&dd->cspec->sdepb_lock, flags); in qib_ibsd_reset()
255 * Before we de-assert reset, we need to deal with in qib_ibsd_reset()
256 * possible glitch on the Parity-error line. in qib_ibsd_reset()
257 * Suppress it around the reset, both in chip-level in qib_ibsd_reset()
265 dd->cspec->hwerrmask & in qib_ibsd_reset()
270 qib_dev_err(dd, "unable to re-sync IB EPB\n"); in qib_ibsd_reset()
276 /* IB uC code past Version 1.32.17 allow suppression of wdog */ in qib_ibsd_reset()
287 /* clear, then re-enable parity errs */ in qib_ibsd_reset()
292 dd->cspec->hwerrmask &= in qib_ibsd_reset()
296 dd->cspec->hwerrmask); in qib_ibsd_reset()
317 qib_dev_err(dd, "not able to re-sync IB EPB (%s)\n", where); in qib_sd_trimdone_monitor()
324 /* Check/show "summary" Trim-done bit in IBCStatus */ in qib_sd_trimdone_monitor()
341 for (chn = 3; chn >= 0; --chn) { in qib_sd_trimdone_monitor()
363 qib_dev_err(dd, "re-read: %d (%02X)\n", in qib_sd_trimdone_monitor()
372 for (chn = 3; chn >= 0; --chn) { in qib_sd_trimdone_monitor()
382 "Failed re-setting TRIMDONE, chn %d (%s)\n", in qib_sd_trimdone_monitor()
389 * Below is portion of IBA7220-specific bringup_serdes() that actually
391 * Post IB uC code version 1.32.17, was_reset being 1 is not really
392 * informative, so we double-check.
405 qib_sd_trimdone_monitor(dd, "Driver-reload"); in qib_sd7220_init()
408 ret = request_firmware(&fw, SD7220_FW_NAME, &dd->pcidev->dev); in qib_sd7220_init()
415 ret = qib_ibsd_ucode_loaded(dd->pport, fw); in qib_sd7220_init()
421 * Alter some regs per vendor latest doc, reset-defaults in qib_sd7220_init()
445 * and "trimdone monitor" that might be counter-productive. in qib_sd7220_init()
484 * De-assert RESET to uC, only in first reset, to allow in qib_sd7220_init()
505 * IBC state-machine. in qib_sd7220_init()
515 * gotten cleared, and re-set them. in qib_sd7220_init()
517 qib_sd_trimdone_monitor(dd, "First-reset"); in qib_sd7220_init()
518 /* Remember so we do not re-do the load, dactrim, etc. */ in qib_sd7220_init()
519 dd->cspec->serdes_first_init_done = 1; in qib_sd7220_init()
532 set_7220_relock_poll(dd, -1); in qib_sd7220_init()
572 oct_sel = (2 << (sdnum - PCIE_SERDES0)); in epb_access()
601 owned = -1; in epb_access()
613 owned = -1; in epb_access()
630 for (tries = EPB_TRANS_TRIES; tries; --tries) { in epb_trans()
637 return -1; in epb_trans()
644 * qib_sd7220_reg_mod - modify SERDES register
647 * @loc: location - channel, element, register, as packed by EPB_LOC() macro.
648 * @wd: Write Data - value to set in register
651 * Basic register read/modify/write, with un-needed acesses elided. That is,
656 static int qib_sd7220_reg_mod(struct qib_devdata *dd, int sdnum, u32 loc, in qib_sd7220_reg_mod() argument
676 return -1; in qib_sd7220_reg_mod()
683 spin_lock_irqsave(&dd->cspec->sdepb_lock, flags); in qib_sd7220_reg_mod()
687 spin_unlock_irqrestore(&dd->cspec->sdepb_lock, flags); in qib_sd7220_reg_mod()
688 return -1; in qib_sd7220_reg_mod()
690 for (tries = EPB_TRANS_TRIES; tries; --tries) { in qib_sd7220_reg_mod()
698 tries = 1; /* to make read-skip work */ in qib_sd7220_reg_mod()
702 * loc encodes chip-select as well as address in qib_sd7220_reg_mod()
704 transval = loc | EPB_RD; in qib_sd7220_reg_mod()
712 transval = loc | (wd & EPB_DATA_MASK); in qib_sd7220_reg_mod()
716 /* else, failed to see ready, what error-handling? */ in qib_sd7220_reg_mod()
721 if (epb_access(dd, sdnum, -1) < 0) in qib_sd7220_reg_mod()
722 ret = -1; in qib_sd7220_reg_mod()
726 spin_unlock_irqrestore(&dd->cspec->sdepb_lock, flags); in qib_sd7220_reg_mod()
728 ret = -1; in qib_sd7220_reg_mod()
735 * Below, all uC-related, use appropriate UC_CS, depending
745 static int qib_sd7220_ram_xfer(struct qib_devdata *dd, int sdnum, u32 loc, in qib_sd7220_ram_xfer() argument
773 return -1; in qib_sd7220_ram_xfer()
776 spin_lock_irqsave(&dd->cspec->sdepb_lock, flags); in qib_sd7220_ram_xfer()
780 spin_unlock_irqrestore(&dd->cspec->sdepb_lock, flags); in qib_sd7220_ram_xfer()
781 return -1; in qib_sd7220_ram_xfer()
785 * In future code, we may need to distinguish several address ranges, in qib_sd7220_ram_xfer()
787 * "loc" (location including address and memory select) to in qib_sd7220_ram_xfer()
791 addr = loc & 0x1FFF; in qib_sd7220_ram_xfer()
792 for (tries = EPB_TRANS_TRIES; tries; --tries) { in qib_sd7220_ram_xfer()
802 * Every "memory" access is doubly-indirect. in qib_sd7220_ram_xfer()
840 /* Finally, clear control-bit for Read or Write */ in qib_sd7220_ram_xfer()
847 if (epb_access(dd, sdnum, -1) < 0) in qib_sd7220_ram_xfer()
848 ret = -1; in qib_sd7220_ram_xfer()
850 spin_unlock_irqrestore(&dd->cspec->sdepb_lock, flags); in qib_sd7220_ram_xfer()
852 ret = -1; in qib_sd7220_ram_xfer()
865 req = len - sofar; in qib_sd7220_prog_ld()
871 sofar = -1; in qib_sd7220_prog_ld()
891 req = len - sofar; in qib_sd7220_prog_vfy()
898 sofar = -1; in qib_sd7220_prog_vfy()
907 return errors ? -errors : sofar; in qib_sd7220_prog_vfy()
913 return qib_sd7220_prog_ld(dd, IB_7220_SERDES, fw->data, fw->size, 0); in qib_sd7220_ib_load()
919 return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, fw->data, fw->size, 0); in qib_sd7220_ib_vfy()
958 * little more human-editable.
959 * First, values related to Drive De-emphasis Settings.
963 #define DDS_REG_MAP 0x76A910 /* LSB-first list of regs (in elt 9) to mod */
1050 taddr = dd->kregbase + kr_serdes_maptable; in qib_sd_setvals()
1051 iaddr = dd->kregbase + kr_serdes_ddsrxeq0; in qib_sd_setvals()
1105 } /* end outer for (Reg-writes for RXEQ) */ in qib_sd_setvals()
1120 * failure, >= 0 for success. The parameter 'loc' is assumed to
1126 static int ibsd_mod_allchnls(struct qib_devdata *dd, int loc, int val, in ibsd_mod_allchnls() argument
1129 int ret = -1; in ibsd_mod_allchnls()
1132 if (loc & EPB_GLOBAL_WR) { in ibsd_mod_allchnls()
1139 loc |= (1U << EPB_IB_QUAD0_CS_SHF); in ibsd_mod_allchnls()
1140 chnl = (loc >> (4 + EPB_ADDR_SHF)) & 7; in ibsd_mod_allchnls()
1143 loc & ~EPB_GLOBAL_WR, 0, 0); in ibsd_mod_allchnls()
1145 int sloc = loc >> EPB_ADDR_SHF; in ibsd_mod_allchnls()
1148 "pre-read failed: elt %d, addr 0x%X, chnl %d\n", in ibsd_mod_allchnls()
1155 loc &= ~(7 << (4+EPB_ADDR_SHF)); in ibsd_mod_allchnls()
1156 ret = qib_sd7220_reg_mod(dd, IB_7220_SERDES, loc, val, 0xFF); in ibsd_mod_allchnls()
1158 int sloc = loc >> EPB_ADDR_SHF; in ibsd_mod_allchnls()
1167 loc &= ~(7 << (4+EPB_ADDR_SHF)); in ibsd_mod_allchnls()
1168 loc |= (1U << EPB_IB_QUAD0_CS_SHF); in ibsd_mod_allchnls()
1170 int cloc = loc | (chnl << (4+EPB_ADDR_SHF)); in ibsd_mod_allchnls()
1174 int sloc = loc >> EPB_ADDR_SHF; in ibsd_mod_allchnls()
1200 data = ddi->reg_vals[idx]; in set_dds_vals()
1220 int elt, reg, val, loc; in set_rxeq_vals() local
1224 loc = EPB_LOC(0, elt, reg); in set_rxeq_vals()
1226 /* mask of 0xFF, because hardware does full-byte store. */ in set_rxeq_vals()
1227 ret = ibsd_mod_allchnls(dd, loc, val, 0xFF); in set_rxeq_vals()
1236 * we do this initially and whenever we turn off IB-1.2
1240 * For experimenting with cables and link-partners, we allow changing
1267 if (!dd->cspec->presets_needed) in qib_sd7220_presets()
1269 dd->cspec->presets_needed = 0; in qib_sd7220_presets()
1273 qib_sd_trimdone_monitor(dd, "link-down"); in qib_sd7220_presets()
1281 int loc = CMUCTRL5 | (1U << EPB_IB_QUAD0_CS_SHF); in qib_sd_trimself() local
1283 return qib_sd7220_reg_mod(dd, IB_7220_SERDES, loc, val, 0xFF); in qib_sd_trimself()
1313 /* more fine-tuning of what will be default */ in qib_sd_dactrim()
1346 int loc = RXLSPPM(0) | EPB_GLOBAL_WR; in toggle_7220_rclkrls() local
1349 ret = ibsd_mod_allchnls(dd, loc, 0, 0x80); in toggle_7220_rclkrls()
1354 ibsd_mod_allchnls(dd, loc, 0x80, 0x80); in toggle_7220_rclkrls()
1358 ret = ibsd_mod_allchnls(dd, loc, 0, 0x80); in toggle_7220_rclkrls()
1363 ibsd_mod_allchnls(dd, loc, 0x80, 0x80); in toggle_7220_rclkrls()
1366 dd->f_xgxs_reset(dd->pport); in toggle_7220_rclkrls()
1377 if (dd->cspec->relock_timer_active) in shutdown_7220_relock_poll()
1378 timer_delete_sync(&dd->cspec->relock_timer); in shutdown_7220_relock_poll()
1389 struct qib_devdata *dd = cs->dd; in qib_run_relock()
1390 struct qib_pportdata *ppd = dd->pport; in qib_run_relock()
1394 * Check link-training state for "stuck" state, when down. in qib_run_relock()
1399 if ((dd->flags & QIB_INITTED) && !(ppd->lflags & in qib_run_relock()
1403 if (!(ppd->lflags & QIBL_IB_LINK_DISABLED)) in qib_run_relock()
1406 /* re-set timer for next check */ in qib_run_relock()
1407 timeoff = cs->relock_interval << 1; in qib_run_relock()
1410 cs->relock_interval = timeoff; in qib_run_relock()
1413 mod_timer(&cs->relock_timer, jiffies + timeoff); in qib_run_relock()
1418 struct qib_chip_specific *cs = dd->cspec; in set_7220_relock_poll()
1422 if (cs->relock_timer_active) { in set_7220_relock_poll()
1423 cs->relock_interval = HZ; in set_7220_relock_poll()
1424 mod_timer(&cs->relock_timer, jiffies + HZ); in set_7220_relock_poll()
1427 /* Transition to down, (re-)set timer to short interval. */ in set_7220_relock_poll()
1434 if (!cs->relock_timer_active) { in set_7220_relock_poll()
1435 cs->relock_timer_active = 1; in set_7220_relock_poll()
1436 timer_setup(&cs->relock_timer, qib_run_relock, 0); in set_7220_relock_poll()
1437 cs->relock_interval = timeout; in set_7220_relock_poll()
1438 cs->relock_timer.expires = jiffies + timeout; in set_7220_relock_poll()
1439 add_timer(&cs->relock_timer); in set_7220_relock_poll()
1441 cs->relock_interval = timeout; in set_7220_relock_poll()
1442 mod_timer(&cs->relock_timer, jiffies + timeout); in set_7220_relock_poll()