33 static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)  in rcar_du_crtc_read()  argument
35 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_read()
37 	return rcar_du_read(rcdu, rcrtc->mmio_offset + reg);  in rcar_du_crtc_read()
40 static void rcar_du_crtc_write(struct rcar_du_crtc *rcrtc, u32 reg, u32 data)  in rcar_du_crtc_write()  argument
42 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_write()
44 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data);  in rcar_du_crtc_write()
47 static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)  in rcar_du_crtc_clr()  argument
49 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_clr()
51 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,  in rcar_du_crtc_clr()
52 		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr);  in rcar_du_crtc_clr()
55 static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)  in rcar_du_crtc_set()  argument
57 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_set()
59 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,  in rcar_du_crtc_set()
60 		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set);  in rcar_du_crtc_set()
63 void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set)  in rcar_du_crtc_dsysr_clr_set()  argument
65 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_dsysr_clr_set()
67 	rcrtc->dsysr = (rcrtc->dsysr & ~clr) | set;  in rcar_du_crtc_dsysr_clr_set()
68 	rcar_du_write(rcdu, rcrtc->mmio_offset + DSYSR, rcrtc->dsysr);  in rcar_du_crtc_dsysr_clr_set()
82 static void rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc,  in rcar_du_dpll_divider()  argument
160 	dev_dbg(rcrtc->dev->dev,  in rcar_du_dpll_divider()
206 static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_set_display_timing()  argument
208 	const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;  in rcar_du_crtc_set_display_timing()
209 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_set_display_timing()
215 	if (rcdu->info->dpll_mask & (1 << rcrtc->index)) {  in rcar_du_crtc_set_display_timing()
226 		extclk = clk_get_rate(rcrtc->extclock);  in rcar_du_crtc_set_display_timing()
227 		rcar_du_dpll_divider(rcrtc, &dpll, extclk, target);  in rcar_du_crtc_set_display_timing()
234 		if (rcrtc->index == 1)  in rcar_du_crtc_set_display_timing()
241 		rcar_du_group_write(rcrtc->group, DPLLCR, dpllcr);  in rcar_du_crtc_set_display_timing()
244 	} else if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) ||  in rcar_du_crtc_set_display_timing()
245 		   rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) {  in rcar_du_crtc_set_display_timing()
256 		rcar_du_escr_divider(rcrtc->clock, mode_clock,  in rcar_du_crtc_set_display_timing()
258 		if (rcrtc->extclock)  in rcar_du_crtc_set_display_timing()
259 			rcar_du_escr_divider(rcrtc->extclock, mode_clock,  in rcar_du_crtc_set_display_timing()
262 		dev_dbg(rcrtc->dev->dev, "mode clock %lu %s rate %lu\n",  in rcar_du_crtc_set_display_timing()
263 			mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext",  in rcar_du_crtc_set_display_timing()
279 	    BIT(rcrtc->index)) {  in rcar_du_crtc_set_display_timing()
280 		dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);  in rcar_du_crtc_set_display_timing()
282 		rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);  in rcar_du_crtc_set_display_timing()
287 	    BIT(rcrtc->index))  in rcar_du_crtc_set_display_timing()
288 		rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);  in rcar_du_crtc_set_display_timing()
295 	rcar_du_crtc_write(rcrtc, DSMR, dsmr);  in rcar_du_crtc_set_display_timing()
303 	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))  in rcar_du_crtc_set_display_timing()
307 	rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start -  in rcar_du_crtc_set_display_timing()
309 	rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start +  in rcar_du_crtc_set_display_timing()
311 	rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end -  in rcar_du_crtc_set_display_timing()
313 	rcar_du_crtc_write(rcrtc, HCR,  mode->htotal - 1);  in rcar_du_crtc_set_display_timing()
315 	rcar_du_crtc_write(rcrtc, VDSR, mode->crtc_vtotal -  in rcar_du_crtc_set_display_timing()
317 	rcar_du_crtc_write(rcrtc, VDER, mode->crtc_vtotal -  in rcar_du_crtc_set_display_timing()
320 	rcar_du_crtc_write(rcrtc, VSPR, mode->crtc_vtotal -  in rcar_du_crtc_set_display_timing()
323 	rcar_du_crtc_write(rcrtc, VCR,  mode->crtc_vtotal - 1);  in rcar_du_crtc_set_display_timing()
325 	rcar_du_crtc_write(rcrtc, DESR,  mode->htotal - mode->hsync_start - 1);  in rcar_du_crtc_set_display_timing()
326 	rcar_du_crtc_write(rcrtc, DEWR,  mode->hdisplay);  in rcar_du_crtc_set_display_timing()
340 static void rcar_du_crtc_update_planes(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_update_planes()  argument
343 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_update_planes()
351 	for (i = 0; i < rcrtc->group->num_planes; ++i) {  in rcar_du_crtc_update_planes()
352 		struct rcar_du_plane *plane = &rcrtc->group->planes[i];  in rcar_du_crtc_update_planes()
355 		if (plane->plane.state->crtc != &rcrtc->crtc ||  in rcar_du_crtc_update_planes()
391 			dspr = (rcrtc->index % 2) + 1;  in rcar_du_crtc_update_planes()
392 			hwplanes = 1 << (rcrtc->index % 2);  in rcar_du_crtc_update_planes()
394 			dspr = (rcrtc->index % 2) ? 3 : 1;  in rcar_du_crtc_update_planes()
395 			hwplanes = 1 << ((rcrtc->index % 2) ? 2 : 0);  in rcar_du_crtc_update_planes()
408 	mutex_lock(&rcrtc->group->lock);  in rcar_du_crtc_update_planes()
410 	dptsr_planes = rcrtc->index % 2 ? rcrtc->group->dptsr_planes | hwplanes  in rcar_du_crtc_update_planes()
411 		     : rcrtc->group->dptsr_planes & ~hwplanes;  in rcar_du_crtc_update_planes()
413 	if (dptsr_planes != rcrtc->group->dptsr_planes) {  in rcar_du_crtc_update_planes()
414 		rcar_du_group_write(rcrtc->group, DPTSR,  in rcar_du_crtc_update_planes()
416 		rcrtc->group->dptsr_planes = dptsr_planes;  in rcar_du_crtc_update_planes()
418 		if (rcrtc->group->used_crtcs)  in rcar_du_crtc_update_planes()
419 			rcar_du_group_restart(rcrtc->group);  in rcar_du_crtc_update_planes()
423 	if (rcrtc->group->need_restart)  in rcar_du_crtc_update_planes()
424 		rcar_du_group_restart(rcrtc->group);  in rcar_du_crtc_update_planes()
426 	mutex_unlock(&rcrtc->group->lock);  in rcar_du_crtc_update_planes()
428 	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR,  in rcar_du_crtc_update_planes()
436 void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_finish_page_flip()  argument
439 	struct drm_device *dev = rcrtc->crtc.dev;  in rcar_du_crtc_finish_page_flip()
443 	event = rcrtc->event;  in rcar_du_crtc_finish_page_flip()
444 	rcrtc->event = NULL;  in rcar_du_crtc_finish_page_flip()
451 	drm_crtc_send_vblank_event(&rcrtc->crtc, event);  in rcar_du_crtc_finish_page_flip()
452 	wake_up(&rcrtc->flip_wait);  in rcar_du_crtc_finish_page_flip()
455 	drm_crtc_vblank_put(&rcrtc->crtc);  in rcar_du_crtc_finish_page_flip()
458 static bool rcar_du_crtc_page_flip_pending(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_page_flip_pending()  argument
460 	struct drm_device *dev = rcrtc->crtc.dev;  in rcar_du_crtc_page_flip_pending()
465 	pending = rcrtc->event != NULL;  in rcar_du_crtc_page_flip_pending()
471 static void rcar_du_crtc_wait_page_flip(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_wait_page_flip()  argument
473 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_wait_page_flip()
475 	if (wait_event_timeout(rcrtc->flip_wait,  in rcar_du_crtc_wait_page_flip()
476 			       !rcar_du_crtc_page_flip_pending(rcrtc),  in rcar_du_crtc_wait_page_flip()
482 	rcar_du_crtc_finish_page_flip(rcrtc);  in rcar_du_crtc_wait_page_flip()
493 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_cmm_check()  local
494 	struct device *dev = rcrtc->dev->dev;  in rcar_du_cmm_check()
512 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_cmm_setup()  local
515 	if (!rcrtc->cmm)  in rcar_du_cmm_setup()
521 	rcar_cmm_setup(rcrtc->cmm, &cmm_config);  in rcar_du_cmm_setup()
528 static void rcar_du_crtc_setup(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_setup()  argument
531 	rcar_du_crtc_write(rcrtc, DOOR, DOOR_RGB(0, 0, 0));  in rcar_du_crtc_setup()
532 	rcar_du_crtc_write(rcrtc, BPOR, BPOR_RGB(0, 0, 0));  in rcar_du_crtc_setup()
535 	rcar_du_crtc_set_display_timing(rcrtc);  in rcar_du_crtc_setup()
536 	rcar_du_group_set_routing(rcrtc->group);  in rcar_du_crtc_setup()
539 	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);  in rcar_du_crtc_setup()
542 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_setup()
543 		rcar_du_vsp_enable(rcrtc);  in rcar_du_crtc_setup()
546 	drm_crtc_vblank_on(&rcrtc->crtc);  in rcar_du_crtc_setup()
549 static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_get()  argument
557 	if (rcrtc->initialized)  in rcar_du_crtc_get()
560 	ret = clk_prepare_enable(rcrtc->clock);  in rcar_du_crtc_get()
564 	ret = clk_prepare_enable(rcrtc->extclock);  in rcar_du_crtc_get()
568 	ret = rcar_du_group_get(rcrtc->group);  in rcar_du_crtc_get()
572 	rcar_du_crtc_setup(rcrtc);  in rcar_du_crtc_get()
573 	rcrtc->initialized = true;  in rcar_du_crtc_get()
578 	clk_disable_unprepare(rcrtc->extclock);  in rcar_du_crtc_get()
580 	clk_disable_unprepare(rcrtc->clock);  in rcar_du_crtc_get()
584 static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_put()  argument
586 	rcar_du_group_put(rcrtc->group);  in rcar_du_crtc_put()
588 	clk_disable_unprepare(rcrtc->extclock);  in rcar_du_crtc_put()
589 	clk_disable_unprepare(rcrtc->clock);  in rcar_du_crtc_put()
591 	rcrtc->initialized = false;  in rcar_du_crtc_put()
594 static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_start()  argument
603 	interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE;  in rcar_du_crtc_start()
604 	rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK | DSYSR_SCM_MASK,  in rcar_du_crtc_start()
608 	rcar_du_group_start_stop(rcrtc->group, true);  in rcar_du_crtc_start()
611 static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_disable_planes()  argument
613 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_disable_planes()
614 	struct drm_crtc *crtc = &rcrtc->crtc;  in rcar_du_crtc_disable_planes()
627 	spin_lock_irq(&rcrtc->vblank_lock);  in rcar_du_crtc_disable_planes()
628 	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);  in rcar_du_crtc_disable_planes()
629 	status = rcar_du_crtc_read(rcrtc, DSSR);  in rcar_du_crtc_disable_planes()
630 	rcrtc->vblank_count = status & DSSR_VBK ? 2 : 1;  in rcar_du_crtc_disable_planes()
631 	spin_unlock_irq(&rcrtc->vblank_lock);  in rcar_du_crtc_disable_planes()
633 	if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0,  in rcar_du_crtc_disable_planes()
640 static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_stop()  argument
642 	struct drm_crtc *crtc = &rcrtc->crtc;  in rcar_du_crtc_stop()
655 	rcar_du_crtc_disable_planes(rcrtc);  in rcar_du_crtc_stop()
662 	rcar_du_crtc_wait_page_flip(rcrtc);  in rcar_du_crtc_stop()
666 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_stop()
667 		rcar_du_vsp_disable(rcrtc);  in rcar_du_crtc_stop()
669 	if (rcrtc->cmm)  in rcar_du_crtc_stop()
670 		rcar_cmm_disable(rcrtc->cmm);  in rcar_du_crtc_stop()
679 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_TVM_SYNC))  in rcar_du_crtc_stop()
680 		rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK,  in rcar_du_crtc_stop()
683 	rcar_du_group_start_stop(rcrtc->group, false);  in rcar_du_crtc_stop()
724 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_enable()  local
726 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_atomic_enable()
728 	if (rcrtc->cmm)  in rcar_du_crtc_atomic_enable()
729 		rcar_cmm_enable(rcrtc->cmm);  in rcar_du_crtc_atomic_enable()
730 	rcar_du_crtc_get(rcrtc);  in rcar_du_crtc_atomic_enable()
738 	if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) {  in rcar_du_crtc_atomic_enable()
740 		struct drm_bridge *bridge = rcdu->lvds[rcrtc->index];  in rcar_du_crtc_atomic_enable()
751 	if ((rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) &&  in rcar_du_crtc_atomic_enable()
754 		struct drm_bridge *bridge = rcdu->dsi[rcrtc->index];  in rcar_du_crtc_atomic_enable()
759 	rcar_du_crtc_start(rcrtc);  in rcar_du_crtc_atomic_enable()
774 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_disable()  local
776 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_atomic_disable()
778 	rcar_du_crtc_stop(rcrtc);  in rcar_du_crtc_atomic_disable()
779 	rcar_du_crtc_put(rcrtc);  in rcar_du_crtc_atomic_disable()
781 	if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) {  in rcar_du_crtc_atomic_disable()
783 		struct drm_bridge *bridge = rcdu->lvds[rcrtc->index];  in rcar_du_crtc_atomic_disable()
793 	if ((rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) &&  in rcar_du_crtc_atomic_disable()
796 		struct drm_bridge *bridge = rcdu->dsi[rcrtc->index];  in rcar_du_crtc_atomic_disable()
816 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_begin()  local
832 	rcar_du_crtc_get(rcrtc);  in rcar_du_crtc_atomic_begin()
838 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_atomic_begin()
839 		rcar_du_vsp_atomic_begin(rcrtc);  in rcar_du_crtc_atomic_begin()
845 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_flush()  local
846 	struct drm_device *dev = rcrtc->crtc.dev;  in rcar_du_crtc_atomic_flush()
849 	rcar_du_crtc_update_planes(rcrtc);  in rcar_du_crtc_atomic_flush()
855 		rcrtc->event = crtc->state->event;  in rcar_du_crtc_atomic_flush()
860 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_atomic_flush()
861 		rcar_du_vsp_atomic_flush(rcrtc);  in rcar_du_crtc_atomic_flush()
868 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_mode_valid()  local
869 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_mode_valid()
883 	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))  in rcar_du_crtc_mode_valid()
905 static void rcar_du_crtc_crc_init(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_crc_init()  argument
907 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_crc_init()
917 	count = rcrtc->vsp->num_planes + 1;  in rcar_du_crtc_crc_init()
927 	for (i = 0; i < rcrtc->vsp->num_planes; ++i) {  in rcar_du_crtc_crc_init()
928 		struct drm_plane *plane = &rcrtc->vsp->planes[i].plane;  in rcar_du_crtc_crc_init()
937 	rcrtc->sources = sources;  in rcar_du_crtc_crc_init()
938 	rcrtc->sources_count = count;  in rcar_du_crtc_crc_init()
949 static void rcar_du_crtc_crc_cleanup(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_crc_cleanup()  argument
953 	if (!rcrtc->sources)  in rcar_du_crtc_crc_cleanup()
956 	for (i = 0; i < rcrtc->sources_count; i++)  in rcar_du_crtc_crc_cleanup()
957 		kfree(rcrtc->sources[i]);  in rcar_du_crtc_crc_cleanup()
958 	kfree(rcrtc->sources);  in rcar_du_crtc_crc_cleanup()
960 	rcrtc->sources = NULL;  in rcar_du_crtc_crc_cleanup()
961 	rcrtc->sources_count = 0;  in rcar_du_crtc_crc_cleanup()
992 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_cleanup()  local
994 	rcar_du_crtc_crc_cleanup(rcrtc);  in rcar_du_crtc_cleanup()
1020 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_enable_vblank()  local
1022 	rcar_du_crtc_write(rcrtc, DSRCR, DSRCR_VBCL);  in rcar_du_crtc_enable_vblank()
1023 	rcar_du_crtc_set(rcrtc, DIER, DIER_VBE);  in rcar_du_crtc_enable_vblank()
1024 	rcrtc->vblank_enable = true;  in rcar_du_crtc_enable_vblank()
1031 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_disable_vblank()  local
1033 	rcar_du_crtc_clr(rcrtc, DIER, DIER_VBE);  in rcar_du_crtc_disable_vblank()
1034 	rcrtc->vblank_enable = false;  in rcar_du_crtc_disable_vblank()
1037 static int rcar_du_crtc_parse_crc_source(struct rcar_du_crtc *rcrtc,  in rcar_du_crtc_parse_crc_source()  argument
1065 		for (i = 0; i < rcrtc->vsp->num_planes; ++i) {  in rcar_du_crtc_parse_crc_source()
1066 			if (index == rcrtc->vsp->planes[i].plane.base.id)  in rcar_du_crtc_parse_crc_source()
1078 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_verify_crc_source()  local
1081 	if (rcar_du_crtc_parse_crc_source(rcrtc, source_name, &source) < 0) {  in rcar_du_crtc_verify_crc_source()
1093 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_get_crc_sources()  local
1095 	*count = rcrtc->sources_count;  in rcar_du_crtc_get_crc_sources()
1096 	return rcrtc->sources;  in rcar_du_crtc_get_crc_sources()
1102 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_set_crc_source()  local
1110 	ret = rcar_du_crtc_parse_crc_source(rcrtc, source_name, &source);  in rcar_du_crtc_set_crc_source()
1187 	struct rcar_du_crtc *rcrtc = arg;  in rcar_du_crtc_irq()  local
1188 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_irq()
1192 	spin_lock(&rcrtc->vblank_lock);  in rcar_du_crtc_irq()
1194 	status = rcar_du_crtc_read(rcrtc, DSSR);  in rcar_du_crtc_irq()
1195 	rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK);  in rcar_du_crtc_irq()
1203 		if (rcrtc->vblank_count) {  in rcar_du_crtc_irq()
1204 			if (--rcrtc->vblank_count == 0)  in rcar_du_crtc_irq()
1205 				wake_up(&rcrtc->vblank_wait);  in rcar_du_crtc_irq()
1209 	spin_unlock(&rcrtc->vblank_lock);  in rcar_du_crtc_irq()
1213 			drm_crtc_handle_vblank(&rcrtc->crtc);  in rcar_du_crtc_irq()
1214 			rcar_du_crtc_finish_page_flip(rcrtc);  in rcar_du_crtc_irq()
1236 	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[swindex];  in rcar_du_crtc_create()  local
1237 	struct drm_crtc *crtc = &rcrtc->crtc;  in rcar_du_crtc_create()
1254 	rcrtc->clock = devm_clk_get(rcdu->dev, name);  in rcar_du_crtc_create()
1255 	if (IS_ERR(rcrtc->clock)) {  in rcar_du_crtc_create()
1257 		return PTR_ERR(rcrtc->clock);  in rcar_du_crtc_create()
1263 		rcrtc->extclock = clk;  in rcar_du_crtc_create()
1276 	init_waitqueue_head(&rcrtc->flip_wait);  in rcar_du_crtc_create()
1277 	init_waitqueue_head(&rcrtc->vblank_wait);  in rcar_du_crtc_create()
1278 	spin_lock_init(&rcrtc->vblank_lock);  in rcar_du_crtc_create()
1280 	rcrtc->dev = rcdu;  in rcar_du_crtc_create()
1281 	rcrtc->group = rgrp;  in rcar_du_crtc_create()
1282 	rcrtc->mmio_offset = mmio_offsets[hwindex];  in rcar_du_crtc_create()
1283 	rcrtc->index = hwindex;  in rcar_du_crtc_create()
1284 	rcrtc->dsysr = rcrtc->index % 2 ? 0 : DSYSR_DRES;  in rcar_du_crtc_create()
1287 		rcrtc->dsysr |= DSYSR_TVM_TVSYNC;  in rcar_du_crtc_create()
1290 		primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane;  in rcar_du_crtc_create()
1303 		rcrtc->cmm = rcdu->cmms[swindex];  in rcar_du_crtc_create()
1328 			       dev_name(rcdu->dev), rcrtc);  in rcar_du_crtc_create()
1335 	rcar_du_crtc_crc_init(rcrtc);  in rcar_du_crtc_create()