1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
11 #include <linux/soc/mediatek/mtk-cmdq.h>
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
29  * struct mtk_crtc - MediaTek specific crtc structure.
97 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_finish_page_flip()
100 	if (mtk_crtc->event) {  in mtk_crtc_finish_page_flip()
101 		spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_crtc_finish_page_flip()
102 		drm_crtc_send_vblank_event(crtc, mtk_crtc->event);  in mtk_crtc_finish_page_flip()
104 		mtk_crtc->event = NULL;  in mtk_crtc_finish_page_flip()
105 		spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_crtc_finish_page_flip()
113 	drm_crtc_handle_vblank(&mtk_crtc->base);  in mtk_drm_finish_page_flip()
116 	if (mtk_crtc->cmdq_client.chan)  in mtk_drm_finish_page_flip()
120 	spin_lock_irqsave(&mtk_crtc->config_lock, flags);  in mtk_drm_finish_page_flip()
121 	if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {  in mtk_drm_finish_page_flip()
123 		mtk_crtc->pending_needs_vblank = false;  in mtk_drm_finish_page_flip()
125 	spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);  in mtk_drm_finish_page_flip()
133 	mtk_mutex_put(mtk_crtc->mutex);  in mtk_crtc_destroy()
135 	if (mtk_crtc->cmdq_client.chan) {  in mtk_crtc_destroy()
136 		cmdq_pkt_destroy(&mtk_crtc->cmdq_client, &mtk_crtc->cmdq_handle);  in mtk_crtc_destroy()
137 		mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_crtc_destroy()
138 		mtk_crtc->cmdq_client.chan = NULL;  in mtk_crtc_destroy()
142 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_destroy()
145 		comp = mtk_crtc->ddp_comp[i];  in mtk_crtc_destroy()
156 	if (crtc->state)  in mtk_crtc_reset()
157 		__drm_atomic_helper_crtc_destroy_state(crtc->state);  in mtk_crtc_reset()
159 	kfree(to_mtk_crtc_state(crtc->state));  in mtk_crtc_reset()
160 	crtc->state = NULL;  in mtk_crtc_reset()
164 		__drm_atomic_helper_crtc_reset(crtc, &state->base);  in mtk_crtc_reset()
175 	__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);  in mtk_crtc_duplicate_state()
177 	WARN_ON(state->base.crtc != crtc);  in mtk_crtc_duplicate_state()
178 	state->base.crtc = crtc;  in mtk_crtc_duplicate_state()
179 	state->pending_config = false;  in mtk_crtc_duplicate_state()
181 	return &state->base;  in mtk_crtc_duplicate_state()
198 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_mode_valid()
199 		status = mtk_ddp_comp_mode_valid(mtk_crtc->ddp_comp[i], mode);  in mtk_crtc_mode_valid()
216 	struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state);  in mtk_crtc_mode_set_nofb()
218 	state->pending_width = crtc->mode.hdisplay;  in mtk_crtc_mode_set_nofb()
219 	state->pending_height = crtc->mode.vdisplay;  in mtk_crtc_mode_set_nofb()
220 	state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode);  in mtk_crtc_mode_set_nofb()
222 	state->pending_config = true;  in mtk_crtc_mode_set_nofb()
230 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_clk_enable()
231 		ret = mtk_ddp_comp_clk_enable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
240 	while (--i >= 0)  in mtk_crtc_ddp_clk_enable()
241 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
249 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_clk_disable()
250 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_disable()
261 	unsigned int local_index = plane - mtk_crtc->planes;  in mtk_ddp_comp_for_plane()
263 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_ddp_comp_for_plane()
264 		comp = mtk_crtc->ddp_comp[i];  in mtk_ddp_comp_for_plane()
266 			*local_layer = local_index - count;  in mtk_ddp_comp_for_plane()
272 	WARN(1, "Failed to find component for plane %d\n", plane->index);  in mtk_ddp_comp_for_plane()
286 	/* release GCE HW usage and start autosuspend */  in ddp_cmdq_cb()
287 	pm_runtime_mark_last_busy(cmdq_cl->chan->mbox->dev);  in ddp_cmdq_cb()
288 	pm_runtime_put_autosuspend(cmdq_cl->chan->mbox->dev);  in ddp_cmdq_cb()
290 	if (data->sta < 0)  in ddp_cmdq_cb()
293 	state = to_mtk_crtc_state(mtk_crtc->base.state);  in ddp_cmdq_cb()
295 	spin_lock_irqsave(&mtk_crtc->config_lock, flags);  in ddp_cmdq_cb()
296 	if (mtk_crtc->config_updating)  in ddp_cmdq_cb()
299 	state->pending_config = false;  in ddp_cmdq_cb()
301 	if (mtk_crtc->pending_planes) {  in ddp_cmdq_cb()
302 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in ddp_cmdq_cb()
303 			struct drm_plane *plane = &mtk_crtc->planes[i];  in ddp_cmdq_cb()
306 			plane_state = to_mtk_plane_state(plane->state);  in ddp_cmdq_cb()
308 			plane_state->pending.config = false;  in ddp_cmdq_cb()
310 		mtk_crtc->pending_planes = false;  in ddp_cmdq_cb()
313 	if (mtk_crtc->pending_async_planes) {  in ddp_cmdq_cb()
314 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in ddp_cmdq_cb()
315 			struct drm_plane *plane = &mtk_crtc->planes[i];  in ddp_cmdq_cb()
318 			plane_state = to_mtk_plane_state(plane->state);  in ddp_cmdq_cb()
320 			plane_state->pending.async_config = false;  in ddp_cmdq_cb()
322 		mtk_crtc->pending_async_planes = false;  in ddp_cmdq_cb()
327 	if (mtk_crtc->pending_needs_vblank) {  in ddp_cmdq_cb()
329 		mtk_crtc->pending_needs_vblank = false;  in ddp_cmdq_cb()
332 	spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);  in ddp_cmdq_cb()
334 	mtk_crtc->cmdq_vblank_cnt = 0;  in ddp_cmdq_cb()
335 	wake_up(&mtk_crtc->cb_blocking_queue);  in ddp_cmdq_cb()
341 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_init()
349 	if (WARN_ON(!crtc->state))  in mtk_crtc_ddp_hw_init()
350 		return -EINVAL;  in mtk_crtc_ddp_hw_init()
352 	width = crtc->state->adjusted_mode.hdisplay;  in mtk_crtc_ddp_hw_init()
353 	height = crtc->state->adjusted_mode.vdisplay;  in mtk_crtc_ddp_hw_init()
354 	vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode);  in mtk_crtc_ddp_hw_init()
356 	drm_for_each_encoder(encoder, crtc->dev) {  in mtk_crtc_ddp_hw_init()
357 		if (encoder->crtc != crtc)  in mtk_crtc_ddp_hw_init()
360 		drm_connector_list_iter_begin(crtc->dev, &conn_iter);  in mtk_crtc_ddp_hw_init()
362 			if (connector->encoder != encoder)  in mtk_crtc_ddp_hw_init()
364 			if (connector->display_info.bpc != 0 &&  in mtk_crtc_ddp_hw_init()
365 			    bpc > connector->display_info.bpc)  in mtk_crtc_ddp_hw_init()
366 				bpc = connector->display_info.bpc;  in mtk_crtc_ddp_hw_init()
371 	ret = pm_runtime_resume_and_get(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
377 	ret = mtk_mutex_prepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
389 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_init()
390 		if (!mtk_ddp_comp_connect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_init()
391 					  mtk_crtc->ddp_comp[i + 1]->id))  in mtk_crtc_ddp_hw_init()
392 			mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_init()
393 					      mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_init()
394 					      mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_init()
395 		if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_init()
396 			mtk_mutex_add_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_init()
397 					   mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
399 	if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_init()
400 		mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
401 	mtk_mutex_enable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
403 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_init()
404 		struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];  in mtk_crtc_ddp_hw_init()
414 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_hw_init()
415 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_hw_init()
420 		plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_hw_init()
423 		plane_state->pending.enable = false;  in mtk_crtc_ddp_hw_init()
433 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
435 	pm_runtime_put(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
441 	struct drm_device *drm = mtk_crtc->base.dev;  in mtk_crtc_ddp_hw_fini()
442 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_fini()
446 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_fini()
447 		mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
449 			mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
452 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_hw_fini()
453 		if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_fini()
454 			mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
455 					      mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
456 	mtk_mutex_disable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
457 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_fini()
458 		if (!mtk_ddp_comp_disconnect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_fini()
459 					     mtk_crtc->ddp_comp[i + 1]->id))  in mtk_crtc_ddp_hw_fini()
460 			mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_fini()
461 						 mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_fini()
462 						 mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_fini()
463 		if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_fini()
464 			mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
465 					      mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
467 	if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_fini()
468 		mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
470 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
472 	pm_runtime_put(drm->dev);  in mtk_crtc_ddp_hw_fini()
474 	if (crtc->state->event && !crtc->state->active) {  in mtk_crtc_ddp_hw_fini()
475 		spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_crtc_ddp_hw_fini()
476 		drm_crtc_send_vblank_event(crtc, crtc->state->event);  in mtk_crtc_ddp_hw_fini()
477 		crtc->state->event = NULL;  in mtk_crtc_ddp_hw_fini()
478 		spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_crtc_ddp_hw_fini()
486 	struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);  in mtk_crtc_ddp_config()
487 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_ddp_config()
496 	if (state->pending_config) {  in mtk_crtc_ddp_config()
497 		mtk_ddp_comp_config(comp, state->pending_width,  in mtk_crtc_ddp_config()
498 				    state->pending_height,  in mtk_crtc_ddp_config()
499 				    state->pending_vrefresh, 0,  in mtk_crtc_ddp_config()
503 			state->pending_config = false;  in mtk_crtc_ddp_config()
506 	if (mtk_crtc->pending_planes) {  in mtk_crtc_ddp_config()
507 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
508 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
511 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
513 			if (!plane_state->pending.config)  in mtk_crtc_ddp_config()
523 				plane_state->pending.config = false;  in mtk_crtc_ddp_config()
527 			mtk_crtc->pending_planes = false;  in mtk_crtc_ddp_config()
530 	if (mtk_crtc->pending_async_planes) {  in mtk_crtc_ddp_config()
531 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
532 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
535 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
537 			if (!plane_state->pending.async_config)  in mtk_crtc_ddp_config()
547 				plane_state->pending.async_config = false;  in mtk_crtc_ddp_config()
551 			mtk_crtc->pending_async_planes = false;  in mtk_crtc_ddp_config()
558 	struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle;  in mtk_crtc_update_config()
560 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_update_config()
561 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_crtc_update_config()
566 	mutex_lock(&mtk_crtc->hw_lock);  in mtk_crtc_update_config()
568 	spin_lock_irqsave(&mtk_crtc->config_lock, flags);  in mtk_crtc_update_config()
569 	mtk_crtc->config_updating = true;  in mtk_crtc_update_config()
570 	spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);  in mtk_crtc_update_config()
573 		mtk_crtc->pending_needs_vblank = true;  in mtk_crtc_update_config()
575 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_update_config()
576 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_update_config()
579 		plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_update_config()
580 		if (plane_state->pending.dirty) {  in mtk_crtc_update_config()
581 			plane_state->pending.config = true;  in mtk_crtc_update_config()
582 			plane_state->pending.dirty = false;  in mtk_crtc_update_config()
584 		} else if (plane_state->pending.async_dirty) {  in mtk_crtc_update_config()
585 			plane_state->pending.async_config = true;  in mtk_crtc_update_config()
586 			plane_state->pending.async_dirty = false;  in mtk_crtc_update_config()
591 		mtk_crtc->pending_planes = true;  in mtk_crtc_update_config()
593 		mtk_crtc->pending_async_planes = true;  in mtk_crtc_update_config()
595 	if (priv->data->shadow_register) {  in mtk_crtc_update_config()
596 		mtk_mutex_acquire(mtk_crtc->mutex);  in mtk_crtc_update_config()
598 		mtk_mutex_release(mtk_crtc->mutex);  in mtk_crtc_update_config()
601 	if (mtk_crtc->cmdq_client.chan) {  in mtk_crtc_update_config()
602 		mbox_flush(mtk_crtc->cmdq_client.chan, 2000);  in mtk_crtc_update_config()
603 		cmdq_handle->cmd_buf_size = 0;  in mtk_crtc_update_config()
604 		cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);  in mtk_crtc_update_config()
605 		cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);  in mtk_crtc_update_config()
608 		dma_sync_single_for_device(mtk_crtc->cmdq_client.chan->mbox->dev,  in mtk_crtc_update_config()
609 					   cmdq_handle->pa_base,  in mtk_crtc_update_config()
610 					   cmdq_handle->cmd_buf_size,  in mtk_crtc_update_config()
619 		mtk_crtc->cmdq_vblank_cnt = 3;  in mtk_crtc_update_config()
621 		spin_lock_irqsave(&mtk_crtc->config_lock, flags);  in mtk_crtc_update_config()
622 		mtk_crtc->config_updating = false;  in mtk_crtc_update_config()
623 		spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);  in mtk_crtc_update_config()
625 		if (pm_runtime_resume_and_get(mtk_crtc->cmdq_client.chan->mbox->dev) < 0)  in mtk_crtc_update_config()
628 		mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle);  in mtk_crtc_update_config()
629 		mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0);  in mtk_crtc_update_config()
633 	spin_lock_irqsave(&mtk_crtc->config_lock, flags);  in mtk_crtc_update_config()
634 	mtk_crtc->config_updating = false;  in mtk_crtc_update_config()
635 	spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);  in mtk_crtc_update_config()
640 	mutex_unlock(&mtk_crtc->hw_lock);  in mtk_crtc_update_config()
647 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_crtc_ddp_irq()
650 	if (!priv->data->shadow_register && !mtk_crtc->cmdq_client.chan)  in mtk_crtc_ddp_irq()
652 	else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt == 0)  in mtk_crtc_ddp_irq()
654 			  drm_crtc_index(&mtk_crtc->base));  in mtk_crtc_ddp_irq()
656 	if (!priv->data->shadow_register)  in mtk_crtc_ddp_irq()
665 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_enable_vblank()
675 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_disable_vblank()
686 	struct drm_crtc_state *crtc_state = state->crtcs[crtc_index].new_state;  in mtk_crtc_update_output()
689 	unsigned int encoder_mask = crtc_state->encoder_mask;  in mtk_crtc_update_output()
691 	if (!crtc_state->connectors_changed)  in mtk_crtc_update_output()
694 	if (!mtk_crtc->num_conn_routes)  in mtk_crtc_update_output()
697 	priv = ((struct mtk_drm_private *)crtc->dev->dev_private)->all_drm_private[crtc_index];  in mtk_crtc_update_output()
698 	dev = priv->dev;  in mtk_crtc_update_output()
701 		crtc_state->connectors_changed, encoder_mask, crtc_index);  in mtk_crtc_update_output()
703 	for (i = 0; i < mtk_crtc->num_conn_routes; i++) {  in mtk_crtc_update_output()
704 		unsigned int comp_id = mtk_crtc->conn_routes[i].route_ddp;  in mtk_crtc_update_output()
705 		struct mtk_ddp_comp *comp = &priv->ddp_comp[comp_id];  in mtk_crtc_update_output()
707 		if (comp->encoder_index >= 0 &&  in mtk_crtc_update_output()
708 		    (encoder_mask & BIT(comp->encoder_index))) {  in mtk_crtc_update_output()
709 			mtk_crtc->ddp_comp[mtk_crtc->ddp_comp_nr - 1] = comp;  in mtk_crtc_update_output()
711 				comp->id, mtk_crtc->ddp_comp_nr - 1);  in mtk_crtc_update_output()
733 	struct mtk_plane_state *plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_plane_disable()
737 	if (!mtk_crtc->cmdq_client.chan)  in mtk_crtc_plane_disable()
740 	if (!mtk_crtc->enabled)  in mtk_crtc_plane_disable()
744 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_plane_disable()
745 		struct drm_plane *mtk_plane = &mtk_crtc->planes[i];  in mtk_crtc_plane_disable()
746 		struct mtk_plane_state *mtk_plane_state = to_mtk_plane_state(mtk_plane->state);  in mtk_crtc_plane_disable()
748 		if (mtk_plane->index == plane->index) {  in mtk_crtc_plane_disable()
756 	wait_event_timeout(mtk_crtc->cb_blocking_queue,  in mtk_crtc_plane_disable()
757 			   mtk_crtc->cmdq_vblank_cnt == 0,  in mtk_crtc_plane_disable()
767 	if (!mtk_crtc->enabled)  in mtk_crtc_async_update()
777 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_atomic_enable()
780 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_crtc_atomic_enable()
784 		DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret);  in mtk_crtc_atomic_enable()
797 	mtk_crtc->enabled = true;  in mtk_crtc_atomic_enable()
804 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_atomic_disable()
807 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_crtc_atomic_disable()
808 	if (!mtk_crtc->enabled)  in mtk_crtc_atomic_disable()
812 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_atomic_disable()
813 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_atomic_disable()
816 		plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_atomic_disable()
817 		plane_state->pending.enable = false;  in mtk_crtc_atomic_disable()
818 		plane_state->pending.config = true;  in mtk_crtc_atomic_disable()
820 	mtk_crtc->pending_planes = true;  in mtk_crtc_atomic_disable()
825 	if (mtk_crtc->cmdq_client.chan)  in mtk_crtc_atomic_disable()
826 		wait_event_timeout(mtk_crtc->cb_blocking_queue,  in mtk_crtc_atomic_disable()
827 				   mtk_crtc->cmdq_vblank_cnt == 0,  in mtk_crtc_atomic_disable()
837 	mtk_crtc->enabled = false;  in mtk_crtc_atomic_disable()
849 	if (mtk_crtc->event && mtk_crtc_state->base.event)  in mtk_crtc_atomic_begin()
852 	if (mtk_crtc_state->base.event) {  in mtk_crtc_atomic_begin()
853 		mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);  in mtk_crtc_atomic_begin()
856 		spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_crtc_atomic_begin()
857 		mtk_crtc->event = mtk_crtc_state->base.event;  in mtk_crtc_atomic_begin()
858 		spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_crtc_atomic_begin()
860 		mtk_crtc_state->base.event = NULL;  in mtk_crtc_atomic_begin()
870 	if (crtc->state->color_mgmt_changed)  in mtk_crtc_atomic_flush()
871 		for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_atomic_flush()
872 			mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_crtc_atomic_flush()
873 			mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_crtc_atomic_flush()
875 	mtk_crtc_update_config(mtk_crtc, !!mtk_crtc->event);  in mtk_crtc_atomic_flush()
906 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_init()
907 		if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY)  in mtk_crtc_init()
908 			primary = &mtk_crtc->planes[i];  in mtk_crtc_init()
909 		else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR)  in mtk_crtc_init()
910 			cursor = &mtk_crtc->planes[i];  in mtk_crtc_init()
913 	ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor,  in mtk_crtc_init()
918 	drm_crtc_helper_add(&mtk_crtc->base, &mtk_crtc_helper_funcs);  in mtk_crtc_init()
923 	drm_crtc_cleanup(&mtk_crtc->base);  in mtk_crtc_init()
934 	comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_crtc_num_comp_planes()
935 	if (!comp->funcs)  in mtk_crtc_num_comp_planes()
938 	if (comp_idx == 1 && !comp->funcs->bgclr_in_on)  in mtk_crtc_num_comp_planes()
950 	else if (plane_idx == (num_planes - 1))  in mtk_crtc_plane_type()
962 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_crtc_init_comp_planes()
967 				&mtk_crtc->planes[mtk_crtc->layer_nr],  in mtk_crtc_init_comp_planes()
969 				mtk_crtc_plane_type(mtk_crtc->layer_nr, num_planes),  in mtk_crtc_init_comp_planes()
978 		mtk_crtc->layer_nr++;  in mtk_crtc_init_comp_planes()
994 	return mtk_crtc->dma_dev;  in mtk_crtc_dma_dev_get()
1002 	struct mtk_drm_private *priv = drm_dev->dev_private;  in mtk_crtc_create()
1003 	struct device *dev = drm_dev->dev;  in mtk_crtc_create()
1016 	priv = priv->all_drm_private[priv_data_index];  in mtk_crtc_create()
1026 		node = priv->comp_node[comp_id];  in mtk_crtc_create()
1027 		comp = &priv->ddp_comp[comp_id];  in mtk_crtc_create()
1039 		if (!comp->dev) {  in mtk_crtc_create()
1041 			return -ENODEV;  in mtk_crtc_create()
1047 		return -ENOMEM;  in mtk_crtc_create()
1049 	mtk_crtc->mmsys_dev = priv->mmsys_dev;  in mtk_crtc_create()
1050 	mtk_crtc->ddp_comp_nr = path_len;  in mtk_crtc_create()
1051 	mtk_crtc->ddp_comp = devm_kcalloc(dev,  in mtk_crtc_create()
1052 					  mtk_crtc->ddp_comp_nr + (conn_routes ? 1 : 0),  in mtk_crtc_create()
1053 					  sizeof(*mtk_crtc->ddp_comp),  in mtk_crtc_create()
1055 	if (!mtk_crtc->ddp_comp)  in mtk_crtc_create()
1056 		return -ENOMEM;  in mtk_crtc_create()
1058 	mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev);  in mtk_crtc_create()
1059 	if (IS_ERR(mtk_crtc->mutex)) {  in mtk_crtc_create()
1060 		ret = PTR_ERR(mtk_crtc->mutex);  in mtk_crtc_create()
1065 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_create()
1069 		comp = &priv->ddp_comp[comp_id];  in mtk_crtc_create()
1070 		mtk_crtc->ddp_comp[i] = comp;  in mtk_crtc_create()
1072 		if (comp->funcs) {  in mtk_crtc_create()
1073 			if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size) {  in mtk_crtc_create()
1080 			if (comp->funcs->ctm_set)  in mtk_crtc_create()
1085 						&mtk_crtc->base);  in mtk_crtc_create()
1088 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_create()
1091 	mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,  in mtk_crtc_create()
1093 	if (!mtk_crtc->planes)  in mtk_crtc_create()
1094 		return -ENOMEM;  in mtk_crtc_create()
1096 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_create()
1107 	mtk_crtc->dma_dev = mtk_ddp_comp_dma_dev_get(&priv->ddp_comp[path[0]]);  in mtk_crtc_create()
1114 		drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size);  in mtk_crtc_create()
1115 	drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size);  in mtk_crtc_create()
1116 	mutex_init(&mtk_crtc->hw_lock);  in mtk_crtc_create()
1117 	spin_lock_init(&mtk_crtc->config_lock);  in mtk_crtc_create()
1120 	i = priv->mbox_index++;  in mtk_crtc_create()
1121 	mtk_crtc->cmdq_client.client.dev = mtk_crtc->mmsys_dev;  in mtk_crtc_create()
1122 	mtk_crtc->cmdq_client.client.tx_block = false;  in mtk_crtc_create()
1123 	mtk_crtc->cmdq_client.client.knows_txdone = true;  in mtk_crtc_create()
1124 	mtk_crtc->cmdq_client.client.rx_callback = ddp_cmdq_cb;  in mtk_crtc_create()
1125 	mtk_crtc->cmdq_client.chan =  in mtk_crtc_create()
1126 			mbox_request_channel(&mtk_crtc->cmdq_client.client, i);  in mtk_crtc_create()
1127 	if (IS_ERR(mtk_crtc->cmdq_client.chan)) {  in mtk_crtc_create()
1129 			drm_crtc_index(&mtk_crtc->base));  in mtk_crtc_create()
1130 		mtk_crtc->cmdq_client.chan = NULL;  in mtk_crtc_create()
1133 	if (mtk_crtc->cmdq_client.chan) {  in mtk_crtc_create()
1134 		ret = of_property_read_u32_index(priv->mutex_node,  in mtk_crtc_create()
1135 						 "mediatek,gce-events",  in mtk_crtc_create()
1137 						 &mtk_crtc->cmdq_event);  in mtk_crtc_create()
1139 			dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n",  in mtk_crtc_create()
1140 				drm_crtc_index(&mtk_crtc->base));  in mtk_crtc_create()
1141 			mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_crtc_create()
1142 			mtk_crtc->cmdq_client.chan = NULL;  in mtk_crtc_create()
1144 			ret = cmdq_pkt_create(&mtk_crtc->cmdq_client,  in mtk_crtc_create()
1145 					      &mtk_crtc->cmdq_handle,  in mtk_crtc_create()
1149 					drm_crtc_index(&mtk_crtc->base));  in mtk_crtc_create()
1150 				mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_crtc_create()
1151 				mtk_crtc->cmdq_client.chan = NULL;  in mtk_crtc_create()
1156 		init_waitqueue_head(&mtk_crtc->cb_blocking_queue);  in mtk_crtc_create()
1163 			struct device_node *node = priv->comp_node[comp_id];  in mtk_crtc_create()
1164 			struct mtk_ddp_comp *comp = &priv->ddp_comp[comp_id];  in mtk_crtc_create()
1166 			if (!comp->dev) {  in mtk_crtc_create()
1169 				/* mark encoder_index to -1, if route comp device is not enabled */  in mtk_crtc_create()
1170 				comp->encoder_index = -1;  in mtk_crtc_create()
1174 			mtk_ddp_comp_encoder_index_set(&priv->ddp_comp[comp_id]);  in mtk_crtc_create()
1177 		mtk_crtc->num_conn_routes = num_conn_routes;  in mtk_crtc_create()
1178 		mtk_crtc->conn_routes = conn_routes;  in mtk_crtc_create()
1181 		mtk_crtc->ddp_comp_nr++;  in mtk_crtc_create()