258 sanitize_target_dc_state(struct drm_i915_private *i915,  in sanitize_target_dc_state()  argument
261 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in sanitize_target_dc_state()
341 	struct drm_i915_private *i915 = container_of(power_domains,  in assert_async_put_domain_masks_disjoint()  local
345 	return !drm_WARN_ON(&i915->drm,  in assert_async_put_domain_masks_disjoint()
354 	struct drm_i915_private *i915 = container_of(power_domains,  in __async_put_domains_state_ok()  local
363 	err |= drm_WARN_ON(&i915->drm,  in __async_put_domains_state_ok()
368 		err |= drm_WARN_ON(&i915->drm,  in __async_put_domains_state_ok()
377 	struct drm_i915_private *i915 = container_of(power_domains,  in print_power_domains()  local
382 	drm_dbg(&i915->drm, "%s (%d):\n", prefix, bitmap_weight(mask->bits, POWER_DOMAIN_NUM));  in print_power_domains()
384 		drm_dbg(&i915->drm, "%s use_count %d\n",  in print_power_domains()
392 	struct drm_i915_private *i915 = container_of(power_domains,  in print_async_put_domains_state()  local
396 	drm_dbg(&i915->drm, "async_put_wakeref: %s\n",  in print_async_put_domains_state()
610 	struct drm_i915_private *i915 = container_of(power_domains,  in queue_async_put_domains_work()  local
613 	drm_WARN_ON(&i915->drm, power_domains->async_put_wakeref);  in queue_async_put_domains_work()
615 	drm_WARN_ON(&i915->drm, !queue_delayed_work(system_unbound_wq,  in queue_async_put_domains_work()
709 void __intel_display_power_put_async(struct drm_i915_private *i915,  in __intel_display_power_put_async()  argument
714 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in __intel_display_power_put_async()
715 	struct intel_runtime_pm *rpm = &i915->runtime_pm;  in __intel_display_power_put_async()
723 		__intel_display_power_put_domain(i915, domain);  in __intel_display_power_put_async()
728 	drm_WARN_ON(&i915->drm, power_domains->domain_use_count[domain] != 1);  in __intel_display_power_put_async()
765 void intel_display_power_flush_work(struct drm_i915_private *i915)  in intel_display_power_flush_work()  argument
767 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_display_power_flush_work()
787 		intel_runtime_pm_put_raw(&i915->runtime_pm, work_wakeref);  in intel_display_power_flush_work()
798 intel_display_power_flush_work_sync(struct drm_i915_private *i915)  in intel_display_power_flush_work_sync()  argument
800 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_display_power_flush_work_sync()
802 	intel_display_power_flush_work(i915);  in intel_display_power_flush_work_sync()
807 	drm_WARN_ON(&i915->drm, power_domains->async_put_wakeref);  in intel_display_power_flush_work_sync()
851 intel_display_power_get_in_set(struct drm_i915_private *i915,  in intel_display_power_get_in_set()  argument
857 	drm_WARN_ON(&i915->drm, test_bit(domain, power_domain_set->mask.bits));  in intel_display_power_get_in_set()
859 	wf = intel_display_power_get(i915, domain);  in intel_display_power_get_in_set()
867 intel_display_power_get_in_set_if_enabled(struct drm_i915_private *i915,  in intel_display_power_get_in_set_if_enabled()  argument
873 	drm_WARN_ON(&i915->drm, test_bit(domain, power_domain_set->mask.bits));  in intel_display_power_get_in_set_if_enabled()
875 	wf = intel_display_power_get_if_enabled(i915, domain);  in intel_display_power_get_in_set_if_enabled()
888 intel_display_power_put_mask_in_set(struct drm_i915_private *i915,  in intel_display_power_put_mask_in_set()  argument
894 	drm_WARN_ON(&i915->drm,  in intel_display_power_put_mask_in_set()
903 		intel_display_power_put(i915, domain, wf);  in intel_display_power_put_mask_in_set()
1914 void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)  in intel_power_domains_init_hw()  argument
1916 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_power_domains_init_hw()
1920 	if (DISPLAY_VER(i915) >= 11) {  in intel_power_domains_init_hw()
1921 		icl_display_core_init(i915, resume);  in intel_power_domains_init_hw()
1922 	} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {  in intel_power_domains_init_hw()
1923 		bxt_display_core_init(i915, resume);  in intel_power_domains_init_hw()
1924 	} else if (DISPLAY_VER(i915) == 9) {  in intel_power_domains_init_hw()
1925 		skl_display_core_init(i915, resume);  in intel_power_domains_init_hw()
1926 	} else if (IS_CHERRYVIEW(i915)) {  in intel_power_domains_init_hw()
1928 		chv_phy_control_init(i915);  in intel_power_domains_init_hw()
1930 		assert_isp_power_gated(i915);  in intel_power_domains_init_hw()
1931 	} else if (IS_VALLEYVIEW(i915)) {  in intel_power_domains_init_hw()
1933 		vlv_cmnlane_wa(i915);  in intel_power_domains_init_hw()
1935 		assert_ved_power_gated(i915);  in intel_power_domains_init_hw()
1936 		assert_isp_power_gated(i915);  in intel_power_domains_init_hw()
1937 	} else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) {  in intel_power_domains_init_hw()
1938 		hsw_assert_cdclk(i915);  in intel_power_domains_init_hw()
1939 		intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915));  in intel_power_domains_init_hw()
1940 	} else if (IS_IVYBRIDGE(i915)) {  in intel_power_domains_init_hw()
1941 		intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915));  in intel_power_domains_init_hw()
1950 	drm_WARN_ON(&i915->drm, power_domains->init_wakeref);  in intel_power_domains_init_hw()
1952 		intel_display_power_get(i915, POWER_DOMAIN_INIT);  in intel_power_domains_init_hw()
1955 	if (!i915->display.params.disable_power_well) {  in intel_power_domains_init_hw()
1956 		drm_WARN_ON(&i915->drm, power_domains->disable_wakeref);  in intel_power_domains_init_hw()
1957 		i915->display.power.domains.disable_wakeref = intel_display_power_get(i915,  in intel_power_domains_init_hw()
1960 	intel_power_domains_sync_hw(i915);  in intel_power_domains_init_hw()
1976 void intel_power_domains_driver_remove(struct drm_i915_private *i915)  in intel_power_domains_driver_remove()  argument
1979 		fetch_and_zero(&i915->display.power.domains.init_wakeref);  in intel_power_domains_driver_remove()
1982 	if (!i915->display.params.disable_power_well)  in intel_power_domains_driver_remove()
1983 		intel_display_power_put(i915, POWER_DOMAIN_INIT,  in intel_power_domains_driver_remove()
1984 					fetch_and_zero(&i915->display.power.domains.disable_wakeref));  in intel_power_domains_driver_remove()
1986 	intel_display_power_flush_work_sync(i915);  in intel_power_domains_driver_remove()
1988 	intel_power_domains_verify_state(i915);  in intel_power_domains_driver_remove()
1991 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);  in intel_power_domains_driver_remove()
2004 void intel_power_domains_sanitize_state(struct drm_i915_private *i915)  in intel_power_domains_sanitize_state()  argument
2006 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_power_domains_sanitize_state()
2011 	for_each_power_well_reverse(i915, power_well) {  in intel_power_domains_sanitize_state()
2013 		    !intel_power_well_is_enabled(i915, power_well))  in intel_power_domains_sanitize_state()
2016 		drm_dbg_kms(&i915->drm,  in intel_power_domains_sanitize_state()
2019 		intel_power_well_disable(i915, power_well);  in intel_power_domains_sanitize_state()
2037 void intel_power_domains_enable(struct drm_i915_private *i915)  in intel_power_domains_enable()  argument
2040 		fetch_and_zero(&i915->display.power.domains.init_wakeref);  in intel_power_domains_enable()
2042 	intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);  in intel_power_domains_enable()
2043 	intel_power_domains_verify_state(i915);  in intel_power_domains_enable()
2053 void intel_power_domains_disable(struct drm_i915_private *i915)  in intel_power_domains_disable()  argument
2055 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_power_domains_disable()
2057 	drm_WARN_ON(&i915->drm, power_domains->init_wakeref);  in intel_power_domains_disable()
2059 		intel_display_power_get(i915, POWER_DOMAIN_INIT);  in intel_power_domains_disable()
2061 	intel_power_domains_verify_state(i915);  in intel_power_domains_disable()
2075 void intel_power_domains_suspend(struct drm_i915_private *i915, bool s2idle)  in intel_power_domains_suspend()  argument
2077 	struct intel_display *display = &i915->display;  in intel_power_domains_suspend()
2082 	intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);  in intel_power_domains_suspend()
2093 		intel_display_power_flush_work(i915);  in intel_power_domains_suspend()
2094 		intel_power_domains_verify_state(i915);  in intel_power_domains_suspend()
2102 	if (!i915->display.params.disable_power_well)  in intel_power_domains_suspend()
2103 		intel_display_power_put(i915, POWER_DOMAIN_INIT,  in intel_power_domains_suspend()
2104 					fetch_and_zero(&i915->display.power.domains.disable_wakeref));  in intel_power_domains_suspend()
2106 	intel_display_power_flush_work(i915);  in intel_power_domains_suspend()
2107 	intel_power_domains_verify_state(i915);  in intel_power_domains_suspend()
2109 	if (DISPLAY_VER(i915) >= 11)  in intel_power_domains_suspend()
2110 		icl_display_core_uninit(i915);  in intel_power_domains_suspend()
2111 	else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))  in intel_power_domains_suspend()
2112 		bxt_display_core_uninit(i915);  in intel_power_domains_suspend()
2113 	else if (DISPLAY_VER(i915) == 9)  in intel_power_domains_suspend()
2114 		skl_display_core_uninit(i915);  in intel_power_domains_suspend()
2129 void intel_power_domains_resume(struct drm_i915_private *i915)  in intel_power_domains_resume()  argument
2131 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_power_domains_resume()
2134 		intel_power_domains_init_hw(i915, true);  in intel_power_domains_resume()
2137 		drm_WARN_ON(&i915->drm, power_domains->init_wakeref);  in intel_power_domains_resume()
2139 			intel_display_power_get(i915, POWER_DOMAIN_INIT);  in intel_power_domains_resume()
2142 	intel_power_domains_verify_state(i915);  in intel_power_domains_resume()
2147 static void intel_power_domains_dump_info(struct drm_i915_private *i915)  in intel_power_domains_dump_info()  argument
2149 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_power_domains_dump_info()
2152 	for_each_power_well(i915, power_well) {  in intel_power_domains_dump_info()
2155 		drm_dbg(&i915->drm, "%-25s %d\n",  in intel_power_domains_dump_info()
2159 			drm_dbg(&i915->drm, "  %-23s %d\n",  in intel_power_domains_dump_info()
2175 static void intel_power_domains_verify_state(struct drm_i915_private *i915)  in intel_power_domains_verify_state()  argument
2177 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_power_domains_verify_state()
2186 	for_each_power_well(i915, power_well) {  in intel_power_domains_verify_state()
2191 		enabled = intel_power_well_is_enabled(i915, power_well);  in intel_power_domains_verify_state()
2195 			drm_err(&i915->drm,  in intel_power_domains_verify_state()
2205 			drm_err(&i915->drm,  in intel_power_domains_verify_state()
2219 			intel_power_domains_dump_info(i915);  in intel_power_domains_verify_state()
2229 static void intel_power_domains_verify_state(struct drm_i915_private *i915)  in intel_power_domains_verify_state()  argument
2235 void intel_display_power_suspend_late(struct drm_i915_private *i915)  in intel_display_power_suspend_late()  argument
2237 	struct intel_display *display = &i915->display;  in intel_display_power_suspend_late()
2239 	if (DISPLAY_VER(i915) >= 11 || IS_GEMINILAKE(i915) ||  in intel_display_power_suspend_late()
2240 	    IS_BROXTON(i915)) {  in intel_display_power_suspend_late()
2242 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {  in intel_display_power_suspend_late()
2243 		hsw_enable_pc8(i915);  in intel_display_power_suspend_late()
2247 	if (INTEL_PCH_TYPE(i915) >= PCH_CNP && INTEL_PCH_TYPE(i915) < PCH_DG1)  in intel_display_power_suspend_late()
2248 		intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);  in intel_display_power_suspend_late()
2251 void intel_display_power_resume_early(struct drm_i915_private *i915)  in intel_display_power_resume_early()  argument
2253 	struct intel_display *display = &i915->display;  in intel_display_power_resume_early()
2255 	if (DISPLAY_VER(i915) >= 11 || IS_GEMINILAKE(i915) ||  in intel_display_power_resume_early()
2256 	    IS_BROXTON(i915)) {  in intel_display_power_resume_early()
2259 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {  in intel_display_power_resume_early()
2260 		hsw_disable_pc8(i915);  in intel_display_power_resume_early()
2264 	if (INTEL_PCH_TYPE(i915) >= PCH_CNP && INTEL_PCH_TYPE(i915) < PCH_DG1)  in intel_display_power_resume_early()
2265 		intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0);  in intel_display_power_resume_early()
2268 void intel_display_power_suspend(struct drm_i915_private *i915)  in intel_display_power_suspend()  argument
2270 	struct intel_display *display = &i915->display;  in intel_display_power_suspend()
2272 	if (DISPLAY_VER(i915) >= 11) {  in intel_display_power_suspend()
2273 		icl_display_core_uninit(i915);  in intel_display_power_suspend()
2275 	} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {  in intel_display_power_suspend()
2276 		bxt_display_core_uninit(i915);  in intel_display_power_suspend()
2278 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {  in intel_display_power_suspend()
2279 		hsw_enable_pc8(i915);  in intel_display_power_suspend()
2283 void intel_display_power_resume(struct drm_i915_private *i915)  in intel_display_power_resume()  argument
2285 	struct intel_display *display = &i915->display;  in intel_display_power_resume()
2288 	if (DISPLAY_VER(i915) >= 11) {  in intel_display_power_resume()
2290 		icl_display_core_init(i915, true);  in intel_display_power_resume()
2297 	} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {  in intel_display_power_resume()
2299 		bxt_display_core_init(i915, true);  in intel_display_power_resume()
2303 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {  in intel_display_power_resume()
2304 		hsw_disable_pc8(i915);  in intel_display_power_resume()
2308 void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m)  in intel_display_power_debug()  argument
2310 	struct i915_power_domains *power_domains = &i915->display.power.domains;  in intel_display_power_debug()
2455 intel_port_domains_for_platform(struct drm_i915_private *i915,  in intel_port_domains_for_platform()  argument
2459 	if (DISPLAY_VER(i915) >= 13) {  in intel_port_domains_for_platform()
2462 	} else if (DISPLAY_VER(i915) >= 12) {  in intel_port_domains_for_platform()
2465 	} else if (DISPLAY_VER(i915) >= 11) {  in intel_port_domains_for_platform()
2475 intel_port_domains_for_port(struct drm_i915_private *i915, enum port port)  in intel_port_domains_for_port()  argument
2481 	intel_port_domains_for_platform(i915, &domains, &domains_size);  in intel_port_domains_for_port()
2490 intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port)  in intel_display_power_ddi_io_domain()  argument
2492 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_port(i915, port);  in intel_display_power_ddi_io_domain()
2494 	if (drm_WARN_ON(&i915->drm, !domains || domains->ddi_io == POWER_DOMAIN_INVALID))  in intel_display_power_ddi_io_domain()
2501 intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port port)  in intel_display_power_ddi_lanes_domain()  argument
2503 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_port(i915, port);  in intel_display_power_ddi_lanes_domain()
2505 	if (drm_WARN_ON(&i915->drm, !domains || domains->ddi_lanes == POWER_DOMAIN_INVALID))  in intel_display_power_ddi_lanes_domain()
2512 intel_port_domains_for_aux_ch(struct drm_i915_private *i915, enum aux_ch aux_ch)  in intel_port_domains_for_aux_ch()  argument
2518 	intel_port_domains_for_platform(i915, &domains, &domains_size);  in intel_port_domains_for_aux_ch()
2527 intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)  in intel_display_power_aux_io_domain()  argument
2529 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(i915, aux_ch);  in intel_display_power_aux_io_domain()
2531 	if (drm_WARN_ON(&i915->drm, !domains || domains->aux_io == POWER_DOMAIN_INVALID))  in intel_display_power_aux_io_domain()
2538 intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)  in intel_display_power_legacy_aux_domain()  argument
2540 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(i915, aux_ch);  in intel_display_power_legacy_aux_domain()
2542 	if (drm_WARN_ON(&i915->drm, !domains || domains->aux_legacy_usbc == POWER_DOMAIN_INVALID))  in intel_display_power_legacy_aux_domain()
2549 intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)  in intel_display_power_tbt_aux_domain()  argument
2551 	const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(i915, aux_ch);  in intel_display_power_tbt_aux_domain()
2553 	if (drm_WARN_ON(&i915->drm, !domains || domains->aux_tbt == POWER_DOMAIN_INVALID))  in intel_display_power_tbt_aux_domain()