Lines Matching +full:big +full:- +full:endian +full:- +full:regs

1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * Copyright 2013-2014 Freescale Semiconductor, Inc.
9 #include <linux/dma-direction.h>
11 #include "virt-dma.h"
249 	struct edma_regs	regs;  member
256 	return fsl_chan->edma->drvdata->flags;  in fsl_edma_drvflags()
260 _Generic(((_tcd)->__name),						\
261 	__iomem __le64 : edma_readq(chan->edma, &(_tcd)->__name),		\
262 	__iomem __le32 : edma_readl(chan->edma, &(_tcd)->__name),		\
263 	__iomem __le16 : edma_readw(chan->edma, &(_tcd)->__name)		\
268 	edma_read_tcdreg_c(chan, ((struct fsl_edma_hw_tcd64 __iomem *)chan->tcd), __name) :	\
269 	edma_read_tcdreg_c(chan, ((struct fsl_edma_hw_tcd __iomem *)chan->tcd), __name)		\
273 _Generic((_tcd->__name),								\
274 	__iomem __le64 : edma_writeq(chan->edma, (u64 __force)(_val), &_tcd->__name),	\
275 	__iomem __le32 : edma_writel(chan->edma, (u32 __force)(_val), &_tcd->__name),	\
276 	__iomem __le16 : edma_writew(chan->edma, (u16 __force)(_val), &_tcd->__name),	\
277 	__iomem u8 : edma_writeb(chan->edma, _val, &_tcd->__name)			\
282 	struct fsl_edma_hw_tcd64 __iomem *tcd64_r = (struct fsl_edma_hw_tcd64 __iomem *)chan->tcd; \
283 	struct fsl_edma_hw_tcd __iomem *tcd_r = (struct fsl_edma_hw_tcd __iomem *)chan->tcd;	   \
293 	struct fsl_edma_hw_tcd64 __iomem *tcd64_r = (struct fsl_edma_hw_tcd64 __iomem *)chan->tcd; \
294 	struct fsl_edma_hw_tcd __iomem *tcd_r = (struct fsl_edma_hw_tcd __iomem *)chan->tcd;	   \
299 		edma_write_tcdreg_c(chan, tcd64_r,  tcd64_m->__name, __name);			   \
301 		edma_write_tcdreg_c(chan, tcd_r, tcd_m->__name, __name);			   \
305 	edma_readl(chan->edma,					\
306 		   (void __iomem *)&(container_of(((__force void *)chan->tcd),\
307 						  struct fsl_edma3_ch_reg, tcd)->__name))
310 	edma_writel(chan->edma, val,				\
311 		   (void __iomem *)&(container_of(((__force void *)chan->tcd),\
312 						  struct fsl_edma3_ch_reg, tcd)->__name))
315 (fsl_edma_drvflags(_chan) & FSL_EDMA_DRV_TCD64 ? (((struct fsl_edma_hw_tcd64 *)_tcd)->_field) : \
316 						 (((struct fsl_edma_hw_tcd *)_tcd)->_field))
327 	fsl_edma_le_to_cpu(((struct fsl_edma_hw_tcd64 *)_tcd)->_field) :	\
328 	fsl_edma_le_to_cpu(((struct fsl_edma_hw_tcd *)_tcd)->_field))
331 _Generic(((_tcd)->_field),								\
332 	__le64 : (_tcd)->_field = cpu_to_le64(_val),					\
333 	__le32 : (_tcd)->_field = cpu_to_le32(_val),					\
334 	__le16 : (_tcd)->_field = cpu_to_le16(_val)					\
346 #include "fsl-edma-trace.h"
349  * R/W functions for big- or little-endian registers:
350  * The eDMA controller's endian is independent of the CPU core's endian.
351  * For the big-endian IP module, the offset for 8-bit or 16-bit registers
352  * should also be swapped opposite to that in little-endian IP.
358 	if (edma->big_endian) {  in edma_readq()
376 	if (edma->big_endian)  in edma_readl()
390 	if (edma->big_endian)  in edma_readw()
403 	/* swap the reg offset for these in big-endian mode */  in edma_writeb()
404 	if (edma->big_endian)  in edma_writeb()
415 	/* swap the reg offset for these in big-endian mode */  in edma_writew()
416 	if (edma->big_endian)  in edma_writew()
427 	if (edma->big_endian)  in edma_writel()
438 	if (edma->big_endian) {  in edma_writeq()
462 	fsl_chan->status = DMA_ERROR;  in fsl_edma_err_chan_handler()