Lines Matching +full:12 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
16 #include "rzv2h-cpg.h"
102 {5, 12},
109 {12, 26},
235 BUS_MSTOP(3, BIT(5))),
237 BUS_MSTOP(5, BIT(10))),
239 BUS_MSTOP(5, BIT(11))),
241 BUS_MSTOP(2, BIT(13))),
243 BUS_MSTOP(2, BIT(14))),
245 BUS_MSTOP(11, BIT(13))),
247 BUS_MSTOP(11, BIT(14))),
249 BUS_MSTOP(11, BIT(15))),
251 BUS_MSTOP(12, BIT(0))),
253 BUS_MSTOP(3, BIT(10))),
254 DEF_MOD("wdt_0_clk_loco", CLK_QEXTAL, 4, 12, 2, 12,
255 BUS_MSTOP(3, BIT(10))),
257 BUS_MSTOP(1, BIT(0))),
259 BUS_MSTOP(1, BIT(0))),
261 BUS_MSTOP(5, BIT(12))),
263 BUS_MSTOP(5, BIT(12))),
265 BUS_MSTOP(5, BIT(13))),
267 BUS_MSTOP(5, BIT(13))),
269 BUS_MSTOP(3, BIT(14))),
271 BUS_MSTOP(10, BIT(15))),
273 BUS_MSTOP(10, BIT(15))),
275 BUS_MSTOP(10, BIT(15))),
277 BUS_MSTOP(3, BIT(13))),
279 BUS_MSTOP(1, BIT(1))),
281 BUS_MSTOP(1, BIT(2))),
283 BUS_MSTOP(1, BIT(3))),
285 BUS_MSTOP(1, BIT(4))),
287 BUS_MSTOP(1, BIT(5))),
289 BUS_MSTOP(1, BIT(6))),
291 BUS_MSTOP(1, BIT(7))),
293 BUS_MSTOP(1, BIT(8))),
295 BUS_MSTOP(4, BIT(5))),
297 BUS_MSTOP(4, BIT(5))),
299 BUS_MSTOP(4, BIT(5))),
301 BUS_MSTOP(8, BIT(2))),
303 BUS_MSTOP(8, BIT(2))),
305 BUS_MSTOP(8, BIT(2))),
307 BUS_MSTOP(8, BIT(2))),
309 BUS_MSTOP(8, BIT(3))),
311 BUS_MSTOP(8, BIT(3))),
313 BUS_MSTOP(8, BIT(3))),
315 BUS_MSTOP(8, BIT(3))),
317 BUS_MSTOP(8, BIT(4))),
318 DEF_MOD("sdhi_2_imclk2", CLK_PLLCLN_DIV8, 10, 12, 5, 12,
319 BUS_MSTOP(8, BIT(4))),
321 BUS_MSTOP(8, BIT(4))),
323 BUS_MSTOP(8, BIT(4))),
325 BUS_MSTOP(7, BIT(12))),
327 BUS_MSTOP(7, BIT(14))),
329 BUS_MSTOP(7, BIT(7))),
331 BUS_MSTOP(7, BIT(9))),
333 BUS_MSTOP(7, BIT(10))),
335 BUS_MSTOP(8, BIT(5)), 1),
337 BUS_MSTOP(8, BIT(5)), 1),
339 BUS_MSTOP(8, BIT(5)), 1),
341 BUS_MSTOP(8, BIT(5)), 1),
342 DEF_MOD("gbeth_0_aclk_csr_i", CLK_PLLDTY_DIV8, 11, 12, 5, 28,
343 BUS_MSTOP(8, BIT(5))),
345 BUS_MSTOP(8, BIT(5))),
347 BUS_MSTOP(8, BIT(6)), 1),
349 BUS_MSTOP(8, BIT(6)), 1),
350 DEF_MOD_MUX_EXTERNAL("gbeth_1_clk_tx_180_i", CLK_SMUX2_GBE1_TXCLK, 12, 0, 6, 0,
351 BUS_MSTOP(8, BIT(6)), 1),
352 DEF_MOD_MUX_EXTERNAL("gbeth_1_clk_rx_180_i", CLK_SMUX2_GBE1_RXCLK, 12, 1, 6, 1,
353 BUS_MSTOP(8, BIT(6)), 1),
354 DEF_MOD("gbeth_1_aclk_csr_i", CLK_PLLDTY_DIV8, 12, 2, 6, 2,
355 BUS_MSTOP(8, BIT(6))),
356 DEF_MOD("gbeth_1_aclk_i", CLK_PLLDTY_DIV8, 12, 3, 6, 3,
357 BUS_MSTOP(8, BIT(6))),
359 BUS_MSTOP(9, BIT(4))),
361 BUS_MSTOP(9, BIT(4))),
363 BUS_MSTOP(9, BIT(4))),
365 BUS_MSTOP(9, BIT(5))),
367 BUS_MSTOP(9, BIT(5))),
369 BUS_MSTOP(9, BIT(5))),
371 BUS_MSTOP(9, BIT(8))),
373 BUS_MSTOP(9, BIT(8))),
375 BUS_MSTOP(9, BIT(9))),
377 BUS_MSTOP(9, BIT(9))),
379 BUS_MSTOP(9, BIT(14) | BIT(15))),
381 BUS_MSTOP(9, BIT(14) | BIT(15))),
383 BUS_MSTOP(9, BIT(14) | BIT(15))),
385 BUS_MSTOP(9, BIT(14) | BIT(15))),
386 DEF_MOD("dsi_0_pllref_clk", CLK_QEXTAL, 14, 12, 7, 12,
387 BUS_MSTOP(9, BIT(14) | BIT(15))),
389 BUS_MSTOP(10, BIT(1) | BIT(2) | BIT(3))),
391 BUS_MSTOP(10, BIT(1) | BIT(2) | BIT(3))),
393 BUS_MSTOP(10, BIT(1) | BIT(2) | BIT(3))),
395 BUS_MSTOP(3, BIT(4))),
397 BUS_MSTOP(3, BIT(4))),
399 BUS_MSTOP(3, BIT(4))),
424 DEF_RST(9, 11, 4, 12), /* RIIC_3_MRST */
425 DEF_RST(9, 12, 4, 13), /* RIIC_4_MRST */
436 DEF_RST(10, 12, 4, 29), /* USB2_0_U2H0_HRESETN */
441 DEF_RST(12, 5, 5, 22), /* CRU_0_PRESETN */
442 DEF_RST(12, 6, 5, 23), /* CRU_0_ARESETN */
443 DEF_RST(12, 7, 5, 24), /* CRU_0_S_RESETN */
444 DEF_RST(12, 8, 5, 25), /* CRU_1_PRESETN */
445 DEF_RST(12, 9, 5, 26), /* CRU_1_ARESETN */
446 DEF_RST(12, 10, 5, 27), /* CRU_1_S_RESETN */
453 DEF_RST(13, 12, 6, 13), /* LCDC_0_RESET_N */