Lines Matching +full:9 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
15 #include "rzv2h-cpg.h"
190 BUS_MSTOP(5, BIT(9))),
192 BUS_MSTOP(3, BIT(2))),
194 BUS_MSTOP(3, BIT(3))),
196 BUS_MSTOP(10, BIT(11))),
198 BUS_MSTOP(10, BIT(12))),
202 BUS_MSTOP(3, BIT(5))),
204 BUS_MSTOP(6, BIT(11))),
206 BUS_MSTOP(6, BIT(12))),
208 BUS_MSTOP(1, BIT(0))),
210 BUS_MSTOP(1, BIT(0))),
212 BUS_MSTOP(5, BIT(12))),
214 BUS_MSTOP(5, BIT(12))),
216 BUS_MSTOP(5, BIT(13))),
218 BUS_MSTOP(5, BIT(13))),
220 BUS_MSTOP(3, BIT(14))),
221 DEF_MOD("i3c_0_pclkrw", CLK_PLLCLN_DIV16, 9, 0, 4, 16,
222 BUS_MSTOP(10, BIT(15))),
223 DEF_MOD("i3c_0_pclk", CLK_PLLCLN_DIV16, 9, 1, 4, 17,
224 BUS_MSTOP(10, BIT(15))),
225 DEF_MOD("i3c_0_tclk", CLK_PLLCLN_DIV8, 9, 2, 4, 18,
226 BUS_MSTOP(10, BIT(15))),
227 DEF_MOD("riic_8_ckm", CLK_PLLCM33_DIV16, 9, 3, 4, 19,
228 BUS_MSTOP(3, BIT(13))),
229 DEF_MOD("riic_0_ckm", CLK_PLLCLN_DIV16, 9, 4, 4, 20,
230 BUS_MSTOP(1, BIT(1))),
231 DEF_MOD("riic_1_ckm", CLK_PLLCLN_DIV16, 9, 5, 4, 21,
232 BUS_MSTOP(1, BIT(2))),
233 DEF_MOD("riic_2_ckm", CLK_PLLCLN_DIV16, 9, 6, 4, 22,
234 BUS_MSTOP(1, BIT(3))),
235 DEF_MOD("riic_3_ckm", CLK_PLLCLN_DIV16, 9, 7, 4, 23,
236 BUS_MSTOP(1, BIT(4))),
237 DEF_MOD("riic_4_ckm", CLK_PLLCLN_DIV16, 9, 8, 4, 24,
238 BUS_MSTOP(1, BIT(5))),
239 DEF_MOD("riic_5_ckm", CLK_PLLCLN_DIV16, 9, 9, 4, 25,
240 BUS_MSTOP(1, BIT(6))),
241 DEF_MOD("riic_6_ckm", CLK_PLLCLN_DIV16, 9, 10, 4, 26,
242 BUS_MSTOP(1, BIT(7))),
243 DEF_MOD("riic_7_ckm", CLK_PLLCLN_DIV16, 9, 11, 4, 27,
244 BUS_MSTOP(1, BIT(8))),
245 DEF_MOD("canfd_0_pclk", CLK_PLLCLN_DIV16, 9, 12, 4, 28,
246 BUS_MSTOP(10, BIT(14))),
247 DEF_MOD("canfd_0_clk_ram", CLK_PLLCLN_DIV8, 9, 13, 4, 29,
248 BUS_MSTOP(10, BIT(14))),
249 DEF_MOD("canfd_0_clkc", CLK_PLLCLN_DIV20, 9, 14, 4, 30,
250 BUS_MSTOP(10, BIT(14))),
251 DEF_MOD("spi_hclk", CLK_PLLCM33_GEAR, 9, 15, 4, 31,
252 BUS_MSTOP(4, BIT(5))),
254 BUS_MSTOP(4, BIT(5))),
256 BUS_MSTOP(4, BIT(5))),
258 BUS_MSTOP(8, BIT(2))),
260 BUS_MSTOP(8, BIT(2))),
262 BUS_MSTOP(8, BIT(2))),
264 BUS_MSTOP(8, BIT(2))),
266 BUS_MSTOP(8, BIT(3))),
268 BUS_MSTOP(8, BIT(3))),
269 DEF_MOD("sdhi_1_clk_hs", CLK_PLLCLN_DIV2, 10, 9, 5, 9,
270 BUS_MSTOP(8, BIT(3))),
272 BUS_MSTOP(8, BIT(3))),
274 BUS_MSTOP(8, BIT(4))),
276 BUS_MSTOP(8, BIT(4))),
278 BUS_MSTOP(8, BIT(4))),
280 BUS_MSTOP(8, BIT(4))),
282 BUS_MSTOP(7, BIT(12))),
284 BUS_MSTOP(7, BIT(14))),
286 BUS_MSTOP(8, BIT(5)), 1),
287 DEF_MOD_MUX_EXTERNAL("gbeth_0_clk_rx_i", CLK_SMUX2_GBE0_RXCLK, 11, 9, 5, 25,
288 BUS_MSTOP(8, BIT(5)), 1),
290 BUS_MSTOP(8, BIT(5)), 1),
292 BUS_MSTOP(8, BIT(5)), 1),
294 BUS_MSTOP(8, BIT(5))),
296 BUS_MSTOP(8, BIT(5))),
298 BUS_MSTOP(8, BIT(6)), 1),
300 BUS_MSTOP(8, BIT(6)), 1),
302 BUS_MSTOP(8, BIT(6)), 1),
304 BUS_MSTOP(8, BIT(6)), 1),
306 BUS_MSTOP(8, BIT(6))),
308 BUS_MSTOP(8, BIT(6))),
310 BUS_MSTOP(9, BIT(4))),
312 BUS_MSTOP(9, BIT(4))),
314 BUS_MSTOP(9, BIT(4))),
316 BUS_MSTOP(3, BIT(4))),
318 BUS_MSTOP(3, BIT(4))),
320 BUS_MSTOP(3, BIT(4))),
322 BUS_MSTOP(2, BIT(15))),
333 DEF_RST(3, 8, 1, 9), /* GIC_0_GICRESET_N */
334 DEF_RST(3, 9, 1, 10), /* GIC_0_DBG_GICRESET_N */
335 DEF_RST(5, 9, 2, 10), /* GPT_0_RST_P_REG */
341 DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
342 DEF_RST(9, 5, 4, 6), /* SCIF_0_RST_SYSTEM_N */
343 DEF_RST(9, 6, 4, 7), /* I3C_0_PRESETN */
344 DEF_RST(9, 7, 4, 8), /* I3C_0_TRESETN */
345 DEF_RST(9, 8, 4, 9), /* RIIC_0_MRST */
346 DEF_RST(9, 9, 4, 10), /* RIIC_1_MRST */
347 DEF_RST(9, 10, 4, 11), /* RIIC_2_MRST */
348 DEF_RST(9, 11, 4, 12), /* RIIC_3_MRST */
349 DEF_RST(9, 12, 4, 13), /* RIIC_4_MRST */
350 DEF_RST(9, 13, 4, 14), /* RIIC_5_MRST */
351 DEF_RST(9, 14, 4, 15), /* RIIC_6_MRST */
352 DEF_RST(9, 15, 4, 16), /* RIIC_7_MRST */
360 DEF_RST(10, 9, 4, 26), /* SDHI_2_IXRST */
370 DEF_RST(15, 8, 7, 9), /* TSU_1_PRESETN */