Lines Matching +full:gcc +full:- +full:sm8250

1 # SPDX-License-Identifier: GPL-2.0-only
242 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
243 	  the output clocks to the networking hardware and GCC blocks.
1027 	tristate "SM8250 Camera Clock Controller"
1031 	  Support for the camera clock controller on SM8250 devices.
1099 	tristate "SM8150/SM8250/SM8350 Display Clock Controller"
1104 	  SM8150/SM8250/SM8350 devices.
1242 	tristate "SM8250 Global Clock Controller"
1246 	  Support for the global clock controller on SM8250 devices.
1360 	tristate "SM8250 Graphics Clock Controller"
1364 	  Support for the graphics clock controller on SM8250 devices.
1411 	  Say Y if you want to toggle LPASS-adjacent resets within
1490 	tristate "SM8250 Video Clock Controller"
1495 	  Support for the video clock controller on SM8250 devices.
1529 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1531 	  Support for the high-frequency PLLs present on Qualcomm devices.
1538 	  Support for the Krait ACC and GCC clock controllers. Say Y
1551 	tristate "SM8250 GFM LPASS Clocks"
1555           subsystem (LPASS) clocks found on SM8250 SoCs.