Lines Matching +full:device +full:- +full:level
1 // SPDX-License-Identifier: GPL-2.0
3 * cacheinfo support - processor cache information via sysfs
16 #include <linux/device.h>
28 #define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
29 #define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
45 * For non DT/ACPI systems, assume unique level 1 caches,
46 * system-wide shared caches for all other levels.
50 return (this_leaf->level != 1) && (sib_leaf->level != 1);
52 if ((sib_leaf->attributes & CACHE_ID) &&
53 (this_leaf->attributes & CACHE_ID))
54 return sib_leaf->id == this_leaf->id;
56 return sib_leaf->fw_token == this_leaf->fw_token;
66 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
68 return (llc->attributes & CACHE_ID) || !!llc->fw_token;
83 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
84 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
98 llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1);
99 llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1);
117 .size_prop = "cache-size",
118 .line_size_props = { "cache-line-size",
119 "cache-block-size", },
120 .nr_sets_prop = "cache-sets",
122 .size_prop = "i-cache-size",
123 .line_size_props = { "i-cache-line-size",
124 "i-cache-block-size", },
125 .nr_sets_prop = "i-cache-sets",
127 .size_prop = "d-cache-size",
128 .line_size_props = { "d-cache-line-size",
129 "d-cache-block-size", },
130 .nr_sets_prop = "d-cache-sets",
146 ct_idx = get_cacheinfo_idx(this_leaf->type);
149 of_property_read_u32(np, propname, &this_leaf->size);
158 ct_idx = get_cacheinfo_idx(this_leaf->type);
169 this_leaf->coherency_line_size = line_size;
180 ct_idx = get_cacheinfo_idx(this_leaf->type);
183 of_property_read_u32(np, propname, &this_leaf->number_of_sets);
188 unsigned int line_size = this_leaf->coherency_line_size;
189 unsigned int nr_sets = this_leaf->number_of_sets;
190 unsigned int size = this_leaf->size;
197 this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
203 return of_property_read_bool(np, "cache-unified");
249 this_leaf->id = min_id;
250 this_leaf->attributes |= CACHE_ID;
258 * init_cache_level must setup the cache level correctly
262 if (this_leaf->type == CACHE_TYPE_NOCACHE &&
264 this_leaf->type = CACHE_TYPE_UNIFIED;
279 pr_err("Failed to find cpu%d device node\n", cpu);
280 return -ENOENT;
284 return -ENOENT;
289 if (this_leaf->level != 1) {
296 this_leaf->fw_token = np;
301 return -ENOENT;
308 if (of_property_present(np, "cache-size") ||
309 of_property_present(np, "i-cache-size") ||
310 of_property_present(np, "d-cache-size") ||
311 of_property_present(np, "cache-unified"))
326 if (of_property_present(np, "cache-size"))
328 if (of_property_present(np, "i-cache-size"))
330 if (of_property_present(np, "d-cache-size"))
334 /* The '[i-|d-|]cache-size' property is required, but
335 * if absent, fallback on the 'cache-unified' property.
337 if (of_property_read_bool(np, "cache-unified"))
350 unsigned int levels = 0, leaves, level;
353 return -ENOENT;
367 return -EINVAL;
368 if (of_property_read_u32(np, "cache-level", &level))
369 return -EINVAL;
370 if (level <= levels)
371 return -EINVAL;
374 levels = level;
377 this_cpu_ci->num_levels = levels;
378 this_cpu_ci->num_leaves = leaves;
390 return -ENOTSUPP;
418 if (this_cpu_ci->cpu_map_populated)
437 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
446 * belong to the same cache level of same type. Skip
447 * the check if level and type do not match.
449 if (sib_leaf->level != this_leaf->level ||
450 sib_leaf->type != this_leaf->type)
454 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
455 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
461 if (this_leaf->coherency_line_size > coherency_max_size)
462 coherency_max_size = this_leaf->coherency_line_size;
466 this_cpu_ci->cpu_map_populated = true;
478 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
487 * belong to the same cache level of same type. Skip
488 * the check if level and type do not match.
490 if (sib_leaf->level != this_leaf->level ||
491 sib_leaf->type != this_leaf->type)
495 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
496 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
504 this_cpu_ci->cpu_map_populated = false;
517 return -ENOENT;
522 return -ENOENT;
527 return -ENOENT;
536 return -ENOMEM;
553 this_cpu_ci->num_levels = levels;
556 * - there cannot be any split caches (data/instruction)
558 * - data/instruction caches come by pair
560 this_cpu_ci->num_leaves = levels + split_levels;
570 return -ENOENT;
572 this_cpu_ci->early_ci_levels = true;
587 * allocated early through the arch-specific early_cache_level() call,
589 * that case, call init_cache_level() anyway to give the arch-specific
592 if (per_cpu_cacheinfo(cpu) && !ci_cacheinfo(cpu)->early_ci_levels)
596 return -ENOENT;
599 * Now that we have properly initialized the cache level info, make
603 ci_cacheinfo(cpu)->early_ci_levels = false;
656 /* pointer to cpuX/cache device */
657 static DEFINE_PER_CPU(struct device *, ci_cache_dev);
663 static DEFINE_PER_CPU(struct device **, ci_index_dev);
668 static ssize_t file_name##_show(struct device *dev, \
672 return sysfs_emit(buf, "%u\n", this_leaf->object); \
676 show_one(level, level);
682 static ssize_t size_show(struct device *dev,
687 return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10);
690 static ssize_t shared_cpu_map_show(struct device *dev,
694 const struct cpumask *mask = &this_leaf->shared_cpu_map;
699 static ssize_t shared_cpu_list_show(struct device *dev,
703 const struct cpumask *mask = &this_leaf->shared_cpu_map;
708 static ssize_t type_show(struct device *dev,
714 switch (this_leaf->type) {
725 return -EINVAL;
731 static ssize_t allocation_policy_show(struct device *dev,
735 unsigned int ci_attr = this_leaf->attributes;
750 static ssize_t write_policy_show(struct device *dev,
754 unsigned int ci_attr = this_leaf->attributes;
765 static DEVICE_ATTR_RO(level);
797 struct device *dev = kobj_to_dev(kobj);
799 const struct cpumask *mask = &this_leaf->shared_cpu_map;
800 umode_t mode = attr->mode;
802 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
804 if ((attr == &dev_attr_type.attr) && this_leaf->type)
806 if ((attr == &dev_attr_level.attr) && this_leaf->level)
813 this_leaf->coherency_line_size)
816 this_leaf->size) /* allow 0 = full associativity */
819 this_leaf->number_of_sets)
821 if ((attr == &dev_attr_size.attr) && this_leaf->size)
824 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
827 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
830 this_leaf->physical_line_partition)
873 /* Add/Remove cache interface for CPU device */
877 struct device *ci_dev;
895 struct device *dev = get_cpu_device(cpu);
898 return -ENOENT;
905 per_cpu_index_dev(cpu) = kzalloc_objs(struct device *,
914 return -ENOMEM;
921 struct device *ci_dev, *parent;
932 if (this_leaf->disable_sysfs)
934 if (this_leaf->type == CACHE_TYPE_NOCACHE)
962 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
964 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
968 *map = &llc->shared_cpu_map;
973 for_each_cpu(sibling, &llc->shared_cpu_map) {
976 sib_llc = per_cpu_cacheinfo_idx(sibling, cache_leaves(sibling) - 1);
977 *map = &sib_llc->shared_cpu_map;
985 * Calculate the size of the per-CPU data cache slice. This can be
991 * Because the cache inclusive/non-inclusive information isn't
992 * available, we just use the size of the per-CPU slice of LLC to make
1005 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
1007 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
1010 nr_shared = cpumask_weight(&llc->shared_cpu_map);
1012 ci->per_cpu_data_slice_size = llc->size / nr_shared;