16 					u64 *hop_addr_arr, u64 virt_addr, enum mmu_hop_num hop_idx)  in get_hop_pte_addr()  argument
20 	mask = mmu_prop->hop_masks[hop_idx];  in get_hop_pte_addr()
21 	shift = mmu_prop->hop_shifts[hop_idx];  in get_hop_pte_addr()
22 	return hop_addr_arr[hop_idx] +  in get_hop_pte_addr()
227 	int hop_idx;  in hl_mmu_v1_unmap()  local
232 	for (hop_idx = MMU_HOP0; hop_idx < MMU_HOP4; hop_idx++) {  in hl_mmu_v1_unmap()
233 		if (hop_idx == MMU_HOP0) {  in hl_mmu_v1_unmap()
234 			hop_addr[hop_idx] = hl_mmu_dr_get_hop0_addr(ctx);  in hl_mmu_v1_unmap()
236 			hop_addr[hop_idx] = hl_mmu_get_next_hop_addr(ctx, curr_pte);  in hl_mmu_v1_unmap()
237 			if (hop_addr[hop_idx] == ULLONG_MAX)  in hl_mmu_v1_unmap()
241 		hop_pte_addr[hop_idx] =  in hl_mmu_v1_unmap()
242 				get_hop_pte_addr(ctx, mmu_prop, hop_addr, virt_addr, hop_idx);  in hl_mmu_v1_unmap()
244 		curr_pte = *(u64 *) (uintptr_t) hop_pte_addr[hop_idx];  in hl_mmu_v1_unmap()
255 		hop_idx = MMU_HOP4;  in hl_mmu_v1_unmap()
256 		hop_addr[hop_idx] = hl_mmu_get_next_hop_addr(ctx, curr_pte);  in hl_mmu_v1_unmap()
257 		if (hop_addr[hop_idx] == ULLONG_MAX)  in hl_mmu_v1_unmap()
260 		hop_pte_addr[hop_idx] =  in hl_mmu_v1_unmap()
261 				get_hop_pte_addr(ctx, mmu_prop, hop_addr, virt_addr, hop_idx);  in hl_mmu_v1_unmap()
262 		curr_pte = *(u64 *) (uintptr_t) hop_pte_addr[hop_idx];  in hl_mmu_v1_unmap()
284 		hop_idx = MMU_HOP3;  in hl_mmu_v1_unmap()
285 		hl_mmu_dr_write_final_pte(ctx, hop_pte_addr[hop_idx], default_pte);  in hl_mmu_v1_unmap()
286 		hl_mmu_dr_put_pte(ctx, hop_addr[hop_idx]);  in hl_mmu_v1_unmap()
302 		for (hop_idx = MMU_HOP3; hop_idx >= 0; hop_idx--) {  in hl_mmu_v1_unmap()
303 			hl_mmu_dr_clear_pte(ctx, hop_pte_addr[hop_idx]);  in hl_mmu_v1_unmap()
305 			if (hop_idx == MMU_HOP0)  in hl_mmu_v1_unmap()
308 			if (hl_mmu_dr_put_pte(ctx, hop_addr[hop_idx]))  in hl_mmu_v1_unmap()
331 	int num_hops, hop_idx, prev_hop, rc = -ENOMEM;  in hl_mmu_v1_map()  local
353 	for (hop_idx = MMU_HOP0; hop_idx < num_hops; hop_idx++) {  in hl_mmu_v1_map()
354 		if (hop_idx == MMU_HOP0) {  in hl_mmu_v1_map()
355 			hop_addr[hop_idx] = hl_mmu_dr_get_hop0_addr(ctx);  in hl_mmu_v1_map()
357 			hop_addr[hop_idx] =  in hl_mmu_v1_map()
358 				hl_mmu_dr_get_alloc_next_hop_addr(ctx, curr_pte, &hop_new[hop_idx]);  in hl_mmu_v1_map()
359 			if (hop_addr[hop_idx] == ULLONG_MAX)  in hl_mmu_v1_map()
363 		hop_pte_addr[hop_idx] =  in hl_mmu_v1_map()
364 				get_hop_pte_addr(ctx, mmu_prop, hop_addr, virt_addr, hop_idx);  in hl_mmu_v1_map()
365 		curr_pte = *(u64 *) (uintptr_t) hop_pte_addr[hop_idx];  in hl_mmu_v1_map()
381 		for (hop_idx = MMU_HOP1; hop_idx < num_hops; hop_idx++) {  in hl_mmu_v1_map()
382 			if (hop_new[hop_idx]) {  in hl_mmu_v1_map()
393 		for (hop_idx = MMU_HOP0; hop_idx < num_hops; hop_idx++)  in hl_mmu_v1_map()
394 			dev_dbg(hdev->dev, "hop%d pte: 0x%llx (0x%llx)\n", hop_idx,  in hl_mmu_v1_map()
395 					*(u64 *) (uintptr_t) hop_pte_addr[hop_idx],  in hl_mmu_v1_map()
396 					hop_pte_addr[hop_idx]);  in hl_mmu_v1_map()
407 	for (hop_idx = MMU_HOP1; hop_idx < num_hops; hop_idx++) {  in hl_mmu_v1_map()
408 		prev_hop = hop_idx - 1;  in hl_mmu_v1_map()
410 		if (hop_new[hop_idx]) {  in hl_mmu_v1_map()
411 			curr_pte = (hop_addr[hop_idx] & HOP_PHYS_ADDR_MASK) | PAGE_PRESENT_MASK;  in hl_mmu_v1_map()
413 			if (hop_idx != MMU_HOP1)  in hl_mmu_v1_map()
423 	for (hop_idx = num_hops; hop_idx > MMU_HOP0; hop_idx--) {  in hl_mmu_v1_map()
424 		if (hop_new[hop_idx])  in hl_mmu_v1_map()
425 			hl_mmu_dr_free_hop(ctx, hop_addr[hop_idx]);  in hl_mmu_v1_map()