Lines Matching +full:multi +full:- +full:ported
1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
27 # Options that are inherently 64-bit kernel only:
58 # ported to 32-bit as well. )
159 # Word-size accesses may read uninitialized data past the trailing \0
340 default "elf32-i386" if X86_32
341 default "elf64-x86-64" if X86_64
435 bool "Symmetric multi-processing support"
441 If you say N here, the kernel will run on uni- and multiprocessor
456 See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
457 <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
487 bool "Enable MSI and MSI-x delivery by posted interrupts"
538 bool "Support for extended (non-PC) x86 platforms"
546 for the following non-PC x86 platforms, depending on the value of
549 32-bit platforms (CONFIG_64BIT=n):
553 RDC R-321x SoC
555 64-bit platforms (CONFIG_64BIT=y):
563 generic distribution kernel, say Y here - otherwise say N.
576 Adds support for Numascale NumaChip large-SMP systems. Needed to
589 supposed to run on these EM64T-based machines. Only choose this option
616 Select to build a kernel capable of supporting 64-bit Intel MID
625 If you are building for a PC class system or non-MID tablet
675 bool "RDC R-321x SoC"
681 This option is needed for RDC R-321x system-on-chip, also known
682 as R-8610-(G).
719 - BayTrail
720 - Braswell
721 - Quark
742 # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
743 # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
762 prompt "Single-depth WCHAN output"
775 Say Y here to enable options for running Linux under various hyper-
798 bool "paravirt-ops debugging"
809 spinlock implementation with something virtualization-friendly
863 bool "Jailhouse non-root cell support"
867 This option allows to run Linux as guest in a Jailhouse non-root
877 a flexible, lightweight reference open-source hypervisor, built with
878 real-time and safety-criticality in mind. It is built for embedded
879 IOT with small footprint and real-time features. More details can be
883 bool "Intel TDX (Trust Domain Extensions) - Guest Support"
908 Use the IA-PC HPET (High Precision Event Timer) to manage
914 as it is off-chip. The interface used is documented
948 The GART supports full DMA access for devices with 32-bit access
957 32-bit limited device.
982 # The ranges are different on 32-bit and 64-bit kernels, depending on
1042 by sharing mid-level caches, last-level cache tags or internal
1050 prompt "Multi-core scheduler support"
1053 Multi-core scheduler support improves the CPU scheduler's decision
1054 making when dealing with multi-core CPU chips at a cost of slightly
1089 integrated interrupt controller in the CPU. If you have a single-CPU
1093 all. The local APIC supports CPU-generated self-interrupts (timer,
1098 bool "IO-APIC support on uniprocessors"
1101 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1102 SMP-capable replacement for PC-style interrupt controllers. Most
1105 If you have a single-CPU system with an IO-APIC, you can say Y here
1107 an IO-APIC, then the kernel will still run with no slowdown at all.
1135 entry in the chipset's IO-APIC is masked (as, e.g. the RT
1209 mode, which is an 80286-era approximation of 16-bit real mode.
1217 a 16-bit DOS program where 16-bit performance matters, vm86
1221 Note that any app that works on a 64-bit kernel is unlikely to
1222 need this option, as 64-bit kernels don't, and can't, support
1223 V8086 mode. This option is also unrelated to 16-bit protected
1224 mode and is not needed to run most 16-bit programs under Wine.
1236 bool "Enable support for 16-bit segments" if EXPERT
1240 This option is required by programs like Wine to run 16-bit
1243 plus 16K runtime memory on x86-64,
1316 CS5530A and CS5536 chipsets and the RDC R-321x SoC.
1364 tristate "/dev/cpu/*/msr - Model-specific register support"
1367 Model-Specific Registers (MSRs). It is a character device with
1369 MSR accesses are directed to a specific CPU on multi-processor
1373 tristate "/dev/cpu/*/cpuid - CPU information support"
1385 However, the address space of 32-bit x86 processors is only 4
1418 will also likely make your kernel incompatible with binary-only
1456 larger swapspace support for non-overcommit purposes. It
1506 Enable NUMA (Non-Uniform Memory Access) support.
1512 For 64-bit this is recommended if the system is Intel Core i7
1523 you have a multi processor AMD system. This uses an old method to
1569 See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
1585 tristate "Support non-standard NVDIMMs and ADR protected memory"
1592 Treat memory marked using the non-standard e820 type of 12 as used
1593 by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1609 Documentation/admin-guide/kernel-parameters.rst to adjust this.
1617 BIOS-originated corruption always affects the same memory,
1651 emulation can be found in <file:arch/x86/math-emu/README>.
1663 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1677 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1679 write-combining. All of these processors are supported by this code
1706 int "MTRR cleanup enable value (0-1)"
1714 int "MTRR cleanup spare reg num (0-7)"
1734 spontaneous reboots) or a non-working video driver.
1750 specific cases in protected and virtual-8086 modes. Emulated
1757 # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1758 # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
1759 def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
1761 $(as-instr,endbr64)
1772 # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1778 hardware support course-grain forward-edge Control Flow Integrity
1793 # Note: only available in 64-bit mode
1799 page-based protections, but without requiring modification of the
1802 For details, see Documentation/core-api/protection-keys.rst
1830 and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1840 TSX is disabled if possible - equals to tsx=off command line parameter.
1845 TSX is always enabled on TSX capable HW - equals the tsx=on command
1852 side channel attacks- equals the tsx=auto command line parameter.
1923 resultant kernel should continue to boot on existing non-EFI
1934 See Documentation/admin-guide/efi-stub.rst for more information.
1954 bool "EFI mixed-mode support"
1957 Enabling this feature allows a 64-bit kernel to be booted
1958 on a 32-bit firmware, provided that your CPU supports 64-bit
1961 Note that it is not possible to boot a mixed-mode enabled
1962 kernel via the EFI boot stub - a bootloader that supports
1971 Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
1975 See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
2047 command line boot parameter passed to the panic-ed
2048 kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
2090 On 64-bit, the kernel physical and virtual addresses are
2097 On 32-bit, the kernel physical and virtual addresses are
2129 If bootloader loads the kernel at a non-aligned address and
2133 If bootloader loads the kernel at a non-aligned address and
2141 On 32-bit this value must be a multiple of 0x2000. On 64-bit
2184 to 64-bit linear addresses, allowing software to use of the
2200 presented with a 32-bit vDSO that is not mapped at the address
2210 dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2213 option from 1 to 0, which turns off the 32-bit vDSO entirely.
2248 certain uses of the vsyscall area as an ASLR-bypassing
2263 bool "Built-in kernel command line"
2275 Systems with fully functional boot loaders (i.e. non-embedded)
2279 string "Built-in kernel command string"
2291 In most cases, the command line (whether built-in or provided
2296 bool "Built-in command line overrides boot loader arguments"
2300 command line, and use ONLY the built-in command line.
2309 Linux can allow user programs to install a per-process x86
2311 call. This is required to run 16-bit or segmented code such as
2316 context switches and increases the low-level kernel attack
2360 def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
2364 # -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN)
2379 def_bool $(cc-option,-mharden-sls=all)
2382 def_bool $(cc-option,-mfunction-return=thunk-extern)
2385 def_bool $(cc-option,-fpatchable-function-entry=16,16)
2388 def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity)
2399 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2465 kernel-to-user data leaks by avoiding speculative indirect
2466 branches. Requires a compiler with -mindirect-branch=thunk-extern
2470 bool "Enable return-thunks"
2475 Compile the kernel with the return-thunks compiler option to guard
2476 against kernel-to-user data leaks by avoiding return speculation.
2477 Requires a compiler with -mfunction-return=thunk-extern
2495 SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
2497 retbleed=stuff option. For non-affected systems the overhead of this
2498 option is marginal as the call depth tracking is using run-time
2513 kernel command line with 'debug-callthunks'.
2523 spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations.
2539 Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2542 bool "Mitigate Straight-Line-Speculation"
2547 Compile the kernel with straight-line-speculation options to guard
2570 See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
2573 bool "Mitigate Spectre-BHB (Branch History Injection)"
2580 See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2590 See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
2601 See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
2609 Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2613 <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
2623 See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
2646 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2658 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2672 <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
2693 See <file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst>
2732 battery status information, and user-space programs will receive
2742 and more information, read <file:Documentation/power/apm-acpi.rst>
2743 and the Battery Powered Linux mini-HOWTO, available from
2748 VESA-compliant "green" monitors.
2800 feature is turned off -- see "Do CPU IDLE calls", below). This
2829 do with your VESA-compliant power-saving monitor. Further, this
2830 option doesn't work for all laptops -- it might not turn off your
2840 needs to. Unfortunately, some BIOSes do not -- especially those in
2864 PCI-based systems don't have any BIOS at all. Linux can also try to
2885 bool "OLPC XO-1"
2897 # x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2946 lspci -nn | grep '1166:0009'
2960 architectures -- if your target machine is modern, it probably does
2965 # x86_64 have no ISA slots, but can have ISA-style DMA.
2967 bool "ISA-style DMA support" if (X86_64 && EXPERT)
2970 Enables ISA-style DMA support for devices requiring such controllers.
2989 PCI-IDs of several on-chip devices, so its a good dependency
2995 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
2999 This driver provides a clocksource built upon the on-chip
3000 27MHz high-resolution timer. Its also a workaround for
3001 NSC Geode SC-1100's buggy TSC, which loses time when the
3018 bool "OLPC XO-1 Power Management"
3021 Add support for poweroff and suspend of the OLPC XO-1 laptop.
3024 bool "OLPC XO-1 Real Time Clock"
3027 Add support for the XO-1 real time clock, which can be used as a
3031 bool "OLPC XO-1 SCI extras"
3036 Add support for SCI-based features of the OLPC XO-1 laptop:
3037 - EC-driven system wakeups
3038 - Power button
3039 - Ebook switch
3040 - Lid switch
3041 - AC adapter status updates
3042 - Battery status updates
3045 bool "OLPC XO-1.5 SCI extras"
3049 Add support for SCI-based features of the OLPC XO-1.5 laptop:
3050 - EC-driven system wakeups
3051 - AC adapter status updates
3052 - Battery status updates
3088 bool "Technologic Systems TS-5500 platform support"
3094 This option enables system support for the Technologic Systems TS-5500.
3117 Include code to run legacy 32-bit programs under a
3118 64-bit kernel. You should likely turn this on, unless you're
3119 100% sure that you don't have any 32-bit programs left.
3126 Make IA32 emulation disabled by default. This prevents loading 32-bit
3127 processes and access to 32-bit syscalls. If unsure, leave it to its
3131 bool "x32 ABI for 64-bit mode"
3133 # llvm-objcopy does not convert x86_64 .note.gnu.property or
3137 depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
3139 Include code to run binaries for the x32 native 32-bit ABI
3140 for 64-bit processors. An x32 process gets access to the
3141 full 64-bit register file and wide data path while leaving