Lines Matching +full:has +full:- +full:legacy +full:- +full:mode
1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
27 # Options that are inherently 64-bit kernel only:
55 # ported to 32-bit as well. )
156 # Word-size accesses may read uninitialized data past the trailing \0
339 default "elf32-i386" if X86_32
340 default "elf64-x86-64" if X86_64
435 bool "Symmetric multi-processing support"
441 If you say N here, the kernel will run on uni- and multiprocessor
456 See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
457 <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
468 This allows 32-bit apic IDs (so it can support very large systems),
471 Some Intel systems circa 2022 and later are locked into x2APIC mode
472 and can not fall back to the legacy APIC modes if SGX or TDX are
479 bool "Enable MSI and MSI-x delivery by posted interrupts"
523 micro-architecture specific knowledge.
530 instead of the legacy SYSCALL/SYSENTER/IDT architecture for
535 bool "Support for extended (non-PC) x86 platforms"
543 for the following non-PC x86 platforms, depending on the value of
546 32-bit platforms (CONFIG_64BIT=n):
549 RDC R-321x SoC
552 64-bit platforms (CONFIG_64BIT=y):
559 generic distribution kernel, say Y here - otherwise say N.
572 Adds support for Numascale NumaChip large-SMP systems. Needed to
585 supposed to run on these EM64T-based machines. Only choose this option
612 Select to build a kernel capable of supporting 64-bit Intel MID
614 the PCI legacy interfaces.
621 If you are building for a PC class system or non-MID tablet
704 - BayTrail
705 - Braswell
706 - Quark
724 bool "RDC R-321x SoC"
730 This option is needed for RDC R-321x system-on-chip, also known
731 as R-8610-(G).
738 # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
739 # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
758 prompt "Single-depth WCHAN output"
771 Say Y here to enable options for running Linux under various hyper-
793 bool "paravirt-ops debugging"
804 spinlock implementation with something virtualization-friendly
807 It has a minimal impact on native kernels and gives a nice performance
858 bool "Jailhouse non-root cell support"
862 This option allows to run Linux as guest in a Jailhouse non-root
872 a flexible, lightweight reference open-source hypervisor, built with
873 real-time and safety-criticality in mind. It is built for embedded
874 IOT with small footprint and real-time features. More details can be
878 bool "Intel TDX (Trust Domain Extensions) - Guest Support"
902 Use the IA-PC HPET (High Precision Event Timer) to manage
905 HPET is the next generation timer replacing legacy 8254s.
908 as it is off-chip. The interface used is documented
915 Choose N to continue using the legacy 8254 timer.
942 The GART supports full DMA access for devices with 32-bit access
951 32-bit limited device.
976 # The ranges are different on 32-bit and 64-bit kernels, depending on
1036 by sharing mid-level caches, last-level cache tags or internal
1044 prompt "Multi-core scheduler support"
1047 Multi-core scheduler support improves the CPU scheduler's decision
1048 making when dealing with multi-core CPU chips at a cost of slightly
1083 integrated interrupt controller in the CPU. If you have a single-CPU
1084 system which has a processor with a local APIC, you can say Y here to
1087 all. The local APIC supports CPU-generated self-interrupts (timer,
1092 bool "IO-APIC support on uniprocessors"
1095 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1096 SMP-capable replacement for PC-style interrupt controllers. Most
1099 If you have a single-CPU system with an IO-APIC, you can say Y here
1101 an IO-APIC, then the kernel will still run with no slowdown at all.
1128 Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
1129 entry in the chipset's IO-APIC is masked (as, e.g. the RT
1199 bool "Legacy VM86 support"
1203 mode, which is an 80286-era approximation of 16-bit real mode.
1206 for user mode setting. Similarly, DOSEMU will use it if
1207 available to accelerate real mode DOS programs. However, any
1211 a 16-bit DOS program where 16-bit performance matters, vm86
1212 mode might be faster than emulation and you might want to
1215 Note that any app that works on a 64-bit kernel is unlikely to
1216 need this option, as 64-bit kernels don't, and can't, support
1217 V8086 mode. This option is also unrelated to 16-bit protected
1218 mode and is not needed to run most 16-bit programs under Wine.
1230 bool "Enable support for 16-bit segments" if EXPERT
1234 This option is required by programs like Wine to run 16-bit
1235 protected mode legacy code on x86 processors. Disabling
1237 plus 16K runtime memory on x86-64,
1252 This enables emulation of the legacy vsyscall page. Disabling
1270 for legacy applications.
1272 Legacy IOPL support is an overbroad mechanism which allows user
1287 This adds a driver to safely access the System Management Mode of
1289 not work on models with a Phoenix BIOS. The System Management Mode
1310 CS5530A and CS5536 chipsets and the RDC R-321x SoC.
1358 tristate "/dev/cpu/*/msr - Model-specific register support"
1361 Model-Specific Registers (MSRs). It is a character device with
1363 MSR accesses are directed to a specific CPU on multi-processor
1367 tristate "/dev/cpu/*/cpuid - CPU information support"
1379 However, the address space of 32-bit x86 processors is only 4
1393 If the machine has between 1 and 4 Gigabytes physical RAM, then
1412 will also likely make your kernel incompatible with binary-only
1450 larger swapspace support for non-overcommit purposes. It
1451 has the cost of more pagetable lookup overhead, and also
1455 bool "Enable 5-level page tables support"
1461 5-level paging enables access to larger address space:
1468 support 4- or 5-level paging.
1470 See Documentation/arch/x86/x86_64/5level-paging.rst for more
1521 Enable NUMA (Non-Uniform Memory Access) support.
1527 For 64-bit this is recommended if the system is Intel Core i7
1584 See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
1600 tristate "Support non-standard NVDIMMs and ADR protected memory"
1607 Treat memory marked using the non-standard e820 type of 12 as used
1608 by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1624 Documentation/admin-guide/kernel-parameters.rst to adjust this.
1626 When enabled with the default parameters, this option has
1632 BIOS-originated corruption always affects the same memory,
1666 emulation can be found in <file:arch/x86/math-emu/README>.
1678 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1685 This code has a reasonably generic interface so that similar
1692 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1693 MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
1694 write-combining. All of these processors are supported by this code
1721 int "MTRR cleanup enable value (0-1)"
1729 int "MTRR cleanup spare reg num (0-7)"
1749 spontaneous reboots) or a non-working video driver.
1755 prompt "User Mode Instruction Prevention" if EXPERT
1757 User Mode Instruction Prevention (UMIP) is a security feature in
1760 executed in user mode. These instructions unnecessarily expose
1765 specific cases in protected and virtual-8086 modes. Emulated
1772 # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1773 # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
1774 def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
1776 $(as-instr,endbr64)
1787 # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1793 hardware support course-grain forward-edge Control Flow Integrity
1808 # Note: only available in 64-bit mode
1814 page-based protections, but without requiring modification of the
1817 For details, see Documentation/core-api/protection-keys.rst
1826 prompt "TSX enable mode"
1834 On the other hand it has been shown that TSX can be exploited
1844 This option allows to set the default tsx mode between tsx=on, =off
1845 and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1855 TSX is disabled if possible - equals to tsx=off command line parameter.
1860 TSX is always enabled on TSX capable HW - equals the tsx=on command
1867 side channel attacks- equals the tsx=auto command line parameter.
1939 resultant kernel should continue to boot on existing non-EFI
1950 See Documentation/admin-guide/efi-stub.rst for more information.
1959 EFI stub. This is a practice that has no basis in the UEFI
1970 bool "EFI mixed-mode support"
1973 Enabling this feature allows a 64-bit kernel to be booted
1974 on a 32-bit firmware, provided that your CPU supports 64-bit
1975 mode.
1977 Note that it is not possible to boot a mixed-mode enabled
1978 kernel via the EFI boot stub - a bootloader that supports
1987 Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
1991 See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
2041 Otherwise, bzImage will run from the address where it has been loaded
2060 command line boot parameter passed to the panic-ed
2061 kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
2088 it has been loaded at and the compile time physical address
2103 On 64-bit, the kernel physical and virtual addresses are
2110 On 32-bit, the kernel physical and virtual addresses are
2141 If bootloader loads the kernel at a non-aligned address and
2145 If bootloader loads the kernel at a non-aligned address and
2147 load address and decompress itself to the address it has been
2153 On 32-bit this value must be a multiple of 0x2000. On 64-bit
2203 to 64-bit linear addresses, allowing software to use of the
2215 prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)"
2219 presented with a 32-bit vDSO that is not mapped at the address
2229 dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2232 option from 1 to 0, which turns off the 32-bit vDSO entirely.
2239 prompt "vsyscall table for legacy applications"
2243 Legacy user code that does not know how to find the vDSO expects
2249 line parameter vsyscall=[emulate|xonly|none]. Emulate mode
2265 legacy vsyscall area but support for legacy binary
2266 instrumentation of legacy code is not needed. It mitigates
2267 certain uses of the vsyscall area as an ASLR-bypassing
2282 bool "Built-in kernel command line"
2294 Systems with fully functional boot loaders (i.e. non-embedded)
2298 string "Built-in kernel command string"
2310 In most cases, the command line (whether built-in or provided
2315 bool "Built-in command line overrides boot loader arguments"
2319 command line, and use ONLY the built-in command line.
2328 Linux can allow user programs to install a per-process x86
2330 call. This is required to run 16-bit or segmented code such as
2335 context switches and increases the low-level kernel attack
2378 def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
2382 # -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN)
2397 def_bool $(cc-option,-mharden-sls=all)
2400 def_bool $(cc-option,-mfunction-return=thunk-extern)
2403 def_bool $(cc-option,-fpatchable-function-entry=16,16)
2406 def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity)
2417 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2467 bool "Remove the kernel mapping in user mode"
2483 kernel-to-user data leaks by avoiding speculative indirect
2484 branches. Requires a compiler with -mindirect-branch=thunk-extern
2488 bool "Enable return-thunks"
2493 Compile the kernel with the return-thunks compiler option to guard
2494 against kernel-to-user data leaks by avoiding return speculation.
2495 Requires a compiler with -mfunction-return=thunk-extern
2513 SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
2515 retbleed=stuff option. For non-affected systems the overhead of this
2516 option is marginal as the call depth tracking is using run-time
2531 kernel command line with 'debug-callthunks'.
2541 spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations.
2557 Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2560 bool "Mitigate Straight-Line-Speculation"
2565 Compile the kernel with straight-line-speculation options to guard
2588 See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
2591 bool "Mitigate Spectre-BHB (Branch History Injection)"
2598 See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2608 See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
2619 See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
2627 Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2631 <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
2641 See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
2664 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2676 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2690 <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
2729 battery status information, and user-space programs will receive
2739 and more information, read <file:Documentation/power/apm-acpi.rst>
2740 and the Battery Powered Linux mini-HOWTO, available from
2745 VESA-compliant "green" monitors.
2797 feature is turned off -- see "Do CPU IDLE calls", below). This
2813 are made after the idle loop has run for some length of time (e.g.,
2826 do with your VESA-compliant power-saving monitor. Further, this
2827 option doesn't work for all laptops -- it might not turn off your
2837 needs to. Unfortunately, some BIOSes do not -- especially those in
2854 prompt "PCI access mode"
2861 PCI-based systems don't have any BIOS at all. Linux can also try to
2882 bool "OLPC XO-1"
2894 # x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2934 configuration. Enable this option if your target machine has an ISA
2936 architectures -- if your target machine is modern, it probably does
2941 # x86_64 have no ISA slots, but can have ISA-style DMA.
2943 bool "ISA-style DMA support" if (X86_64 && EXPERT)
2946 Enables ISA-style DMA support for devices requiring such controllers.
2965 PCI-IDs of several on-chip devices, so its a good dependency
2971 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
2975 This driver provides a clocksource built upon the on-chip
2976 27MHz high-resolution timer. Its also a workaround for
2977 NSC Geode SC-1100's buggy TSC, which loses time when the
2994 bool "OLPC XO-1 Power Management"
2997 Add support for poweroff and suspend of the OLPC XO-1 laptop.
3000 bool "OLPC XO-1 Real Time Clock"
3003 Add support for the XO-1 real time clock, which can be used as a
3007 bool "OLPC XO-1 SCI extras"
3012 Add support for SCI-based features of the OLPC XO-1 laptop:
3013 - EC-driven system wakeups
3014 - Power button
3015 - Ebook switch
3016 - Lid switch
3017 - AC adapter status updates
3018 - Battery status updates
3021 bool "OLPC XO-1.5 SCI extras"
3025 Add support for SCI-based features of the OLPC XO-1.5 laptop:
3026 - EC-driven system wakeups
3027 - AC adapter status updates
3028 - Battery status updates
3064 bool "Technologic Systems TS-5500 platform support"
3070 This option enables system support for the Technologic Systems TS-5500.
3093 Include code to run legacy 32-bit programs under a
3094 64-bit kernel. You should likely turn this on, unless you're
3095 100% sure that you don't have any 32-bit programs left.
3102 Make IA32 emulation disabled by default. This prevents loading 32-bit
3103 processes and access to 32-bit syscalls. If unsure, leave it to its
3107 bool "x32 ABI for 64-bit mode"
3109 # llvm-objcopy does not convert x86_64 .note.gnu.property or
3113 depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
3115 Include code to run binaries for the x32 native 32-bit ABI
3116 for 64-bit processors. An x32 process gets access to the
3117 full 64-bit register file and wide data path while leaving