Lines Matching +full:has +full:- +full:builtin +full:- +full:dma

1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
27 # Options that are inherently 64-bit kernel only:
55 # ported to 32-bit as well. )
153 # Word-size accesses may read uninitialized data past the trailing \0
332 default "elf32-i386" if X86_32
333 default "elf64-x86-64" if X86_64
427 …default $(success,$(srctree)/scripts/gcc-x86_64-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) if 64…
428 default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC) $(CLANG_FLAGS))
432 the segment on 32-bit kernels.
437 bool "Symmetric multi-processing support"
443 If you say N here, the kernel will run on uni- and multiprocessor
458 See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
459 <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
470 This allows 32-bit apic IDs (so it can support very large systems),
481 bool "Enable MSI and MSI-x delivery by posted interrupts"
536 bool "Support for extended (non-PC) x86 platforms"
544 for the following non-PC x86 platforms, depending on the value of
547 32-bit platforms (CONFIG_64BIT=n):
550 RDC R-321x SoC
552 STA2X11-based (e.g. Northville)
555 64-bit platforms (CONFIG_64BIT=y):
561 generic distribution kernel, say Y here - otherwise say N.
574 Adds support for Numascale NumaChip large-SMP systems. Needed to
587 supposed to run on these EM64T-based machines. Only choose this option
698 - BayTrail
699 - Braswell
700 - Quark
718 bool "RDC R-321x SoC"
724 This option is needed for RDC R-321x system-on-chip, also known
725 as R-8610-(G).
729 bool "Support non-standard 32-bit SMP architectures"
744 # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
745 # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
756 This adds support for boards based on the STA2X11 IO-Hub,
777 prompt "Single-depth WCHAN output"
790 Say Y here to enable options for running Linux under various hyper-
812 bool "paravirt-ops debugging"
823 spinlock implementation with something virtualization-friendly
826 It has a minimal impact on native kernels and gives a nice performance
877 bool "Jailhouse non-root cell support"
881 This option allows to run Linux as guest in a Jailhouse non-root
891 a flexible, lightweight reference open-source hypervisor, built with
892 real-time and safety-criticality in mind. It is built for embedded
893 IOT with small footprint and real-time features. More details can be
897 bool "Intel TDX (Trust Domain Extensions) - Guest Support"
921 Use the IA-PC HPET (High Precision Event Timer) to manage
927 as it is off-chip. The interface used is documented
961 The GART supports full DMA access for devices with 32-bit access
970 32-bit limited device.
995 # The ranges are different on 32-bit and 64-bit kernels, depending on
1057 by sharing mid-level caches, last-level cache tags or internal
1065 prompt "Multi-core scheduler support"
1068 Multi-core scheduler support improves the CPU scheduler's decision
1069 making when dealing with multi-core CPU chips at a cost of slightly
1104 integrated interrupt controller in the CPU. If you have a single-CPU
1105 system which has a processor with a local APIC, you can say Y here to
1108 all. The local APIC supports CPU-generated self-interrupts (timer,
1113 bool "IO-APIC support on uniprocessors"
1116 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1117 SMP-capable replacement for PC-style interrupt controllers. Most
1120 If you have a single-CPU system with an IO-APIC, you can say Y here
1122 an IO-APIC, then the kernel will still run with no slowdown at all.
1150 entry in the chipset's IO-APIC is masked (as, e.g. the RT
1224 mode, which is an 80286-era approximation of 16-bit real mode.
1232 a 16-bit DOS program where 16-bit performance matters, vm86
1236 Note that any app that works on a 64-bit kernel is unlikely to
1237 need this option, as 64-bit kernels don't, and can't, support
1238 V8086 mode. This option is also unrelated to 16-bit protected
1239 mode and is not needed to run most 16-bit programs under Wine.
1251 bool "Enable support for 16-bit segments" if EXPERT
1255 This option is required by programs like Wine to run 16-bit
1258 plus 16K runtime memory on x86-64,
1331 CS5530A and CS5536 chipsets and the RDC R-321x SoC.
1378 tristate "/dev/cpu/*/msr - Model-specific register support"
1381 Model-Specific Registers (MSRs). It is a character device with
1383 MSR accesses are directed to a specific CPU on multi-processor
1387 tristate "/dev/cpu/*/cpuid - CPU information support"
1403 However, the address space of 32-bit x86 processors is only 4
1417 If the machine has between 1 and 4 Gigabytes physical RAM, then
1422 PAE implements 3-level paging on IA32 processors. PAE is fully
1438 Select this if you have a 32-bit processor and between 1 and 4
1446 Select this if you have a 32-bit processor and more than 4
1465 will also likely make your kernel incompatible with binary-only
1505 larger swapspace support for non-overcommit purposes. It
1506 has the cost of more pagetable lookup overhead, and also
1510 bool "Enable 5-level page tables support"
1516 5-level paging enables access to larger address space:
1523 support 4- or 5-level paging.
1525 See Documentation/arch/x86/x86_64/5level-paging.rst for more
1576 Enable NUMA (Non-Uniform Memory Access) support.
1582 For 64-bit this is recommended if the system is Intel Core i7
1585 For 32-bit this is only needed if you boot a 32-bit
1586 kernel on a 64-bit NUMA platform.
1597 read the NUMA configuration directly from the builtin Northbridge
1642 See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
1658 tristate "Support non-standard NVDIMMs and ADR protected memory"
1665 Treat memory marked using the non-standard e820 type of 12 as used
1666 by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1673 bool "Allocate 3rd-level pagetables from highmem"
1678 low memory. Setting this option will put user-space page table
1691 Documentation/admin-guide/kernel-parameters.rst to adjust this.
1693 When enabled with the default parameters, this option has
1699 BIOS-originated corruption always affects the same memory,
1733 emulation can be found in <file:arch/x86/math-emu/README>.
1745 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1752 This code has a reasonably generic interface so that similar
1759 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1760 MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
1761 write-combining. All of these processors are supported by this code
1788 int "MTRR cleanup enable value (0-1)"
1796 int "MTRR cleanup spare reg num (0-7)"
1816 spontaneous reboots) or a non-working video driver.
1832 specific cases in protected and virtual-8086 modes. Emulated
1839 # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1840 # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
1841 def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
1843 $(as-instr,endbr64)
1854 # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1860 hardware support course-grain forward-edge Control Flow Integrity
1875 # Note: only available in 64-bit mode
1881 page-based protections, but without requiring modification of the
1884 For details, see Documentation/core-api/protection-keys.rst
1901 On the other hand it has been shown that TSX can be exploited
1912 and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1922 TSX is disabled if possible - equals to tsx=off command line parameter.
1927 TSX is always enabled on TSX capable HW - equals the tsx=on command
1934 side channel attacks- equals the tsx=auto command line parameter.
2006 resultant kernel should continue to boot on existing non-EFI
2017 See Documentation/admin-guide/efi-stub.rst for more information.
2026 EFI stub. This is a practice that has no basis in the UEFI
2037 bool "EFI mixed-mode support"
2040 Enabling this feature allows a 64-bit kernel to be booted
2041 on a 32-bit firmware, provided that your CPU supports 64-bit
2044 Note that it is not possible to boot a mixed-mode enabled
2045 kernel via the EFI boot stub - a bootloader that supports
2054 Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
2058 See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
2108 Otherwise, bzImage will run from the address where it has been loaded
2127 command line boot parameter passed to the panic-ed
2128 kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
2155 it has been loaded at and the compile time physical address
2170 On 64-bit, the kernel physical and virtual addresses are
2177 On 32-bit, the kernel physical and virtual addresses are
2208 If bootloader loads the kernel at a non-aligned address and
2212 If bootloader loads the kernel at a non-aligned address and
2214 load address and decompress itself to the address it has been
2220 On 32-bit this value must be a multiple of 0x2000. On 64-bit
2270 to 64-bit linear addresses, allowing software to use of the
2282 prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)"
2286 presented with a 32-bit vDSO that is not mapped at the address
2296 dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2299 option from 1 to 0, which turns off the 32-bit vDSO entirely.
2334 certain uses of the vsyscall area as an ASLR-bypassing
2349 bool "Built-in kernel command line"
2361 Systems with fully functional boot loaders (i.e. non-embedded)
2365 string "Built-in kernel command string"
2377 In most cases, the command line (whether built-in or provided
2382 bool "Built-in command line overrides boot loader arguments"
2386 command line, and use ONLY the built-in command line.
2395 Linux can allow user programs to install a per-process x86
2397 call. This is required to run 16-bit or segmented code such as
2402 context switches and increases the low-level kernel attack
2445 def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
2455 # -fsanitize=kernel-address (KASAN) and -fsanitize=thread
2457 # GCC < 13.3 - see GCC PR sanitizer/111736.
2462 def_bool $(cc-option,-mharden-sls=all)
2465 def_bool $(cc-option,-mfunction-return=thunk-extern)
2468 def_bool $(cc-option,-fpatchable-function-entry=16,16)
2478 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2540 kernel-to-user data leaks by avoiding speculative indirect
2541 branches. Requires a compiler with -mindirect-branch=thunk-extern
2545 bool "Enable return-thunks"
2550 Compile the kernel with the return-thunks compiler option to guard
2551 against kernel-to-user data leaks by avoiding return speculation.
2552 Requires a compiler with -mfunction-return=thunk-extern
2570 SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
2572 retbleed=stuff option. For non-affected systems the overhead of this
2573 option is marginal as the call depth tracking is using run-time
2588 kernel command line with 'debug-callthunks'.
2613 Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2616 bool "Mitigate Straight-Line-Speculation"
2621 Compile the kernel with straight-line-speculation options to guard
2644 See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
2647 bool "Mitigate Spectre-BHB (Branch History Injection)"
2654 See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2664 See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
2675 See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
2683 Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2687 <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
2697 See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
2720 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2732 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2746 <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
2785 battery status information, and user-space programs will receive
2795 and more information, read <file:Documentation/power/apm-acpi.rst>
2796 and the Battery Powered Linux mini-HOWTO, available from
2801 VESA-compliant "green" monitors.
2853 feature is turned off -- see "Do CPU IDLE calls", below). This
2869 are made after the idle loop has run for some length of time (e.g.,
2882 do with your VESA-compliant power-saving monitor. Further, this
2883 option doesn't work for all laptops -- it might not turn off your
2893 needs to. Unfortunately, some BIOSes do not -- especially those in
2917 PCI-based systems don't have any BIOS at all. Linux can also try to
2938 bool "OLPC XO-1"
2950 # x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2990 configuration. Enable this option if your target machine has an ISA
2992 architectures -- if your target machine is modern, it probably does
2997 # x86_64 have no ISA slots, but can have ISA-style DMA.
2999 bool "ISA-style DMA support" if (X86_64 && EXPERT)
3002 Enables ISA-style DMA support for devices requiring such controllers.
3021 PCI-IDs of several on-chip devices, so its a good dependency
3027 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
3031 This driver provides a clocksource built upon the on-chip
3032 27MHz high-resolution timer. Its also a workaround for
3033 NSC Geode SC-1100's buggy TSC, which loses time when the
3050 bool "OLPC XO-1 Power Management"
3053 Add support for poweroff and suspend of the OLPC XO-1 laptop.
3056 bool "OLPC XO-1 Real Time Clock"
3059 Add support for the XO-1 real time clock, which can be used as a
3063 bool "OLPC XO-1 SCI extras"
3068 Add support for SCI-based features of the OLPC XO-1 laptop:
3069 - EC-driven system wakeups
3070 - Power button
3071 - Ebook switch
3072 - Lid switch
3073 - AC adapter status updates
3074 - Battery status updates
3077 bool "OLPC XO-1.5 SCI extras"
3081 Add support for SCI-based features of the OLPC XO-1.5 laptop:
3082 - EC-driven system wakeups
3083 - AC adapter status updates
3084 - Battery status updates
3120 bool "Technologic Systems TS-5500 platform support"
3126 This option enables system support for the Technologic Systems TS-5500.
3145 Include code to run legacy 32-bit programs under a
3146 64-bit kernel. You should likely turn this on, unless you're
3147 100% sure that you don't have any 32-bit programs left.
3154 Make IA32 emulation disabled by default. This prevents loading 32-bit
3155 processes and access to 32-bit syscalls. If unsure, leave it to its
3159 bool "x32 ABI for 64-bit mode"
3161 # llvm-objcopy does not convert x86_64 .note.gnu.property or
3165 depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
3167 Include code to run binaries for the x32 native 32-bit ABI
3168 for 64-bit processors. An x32 process gets access to the
3169 full 64-bit register file and wide data path while leaving