1 // SPDX-License-Identifier: GPL-2.0
19 /* 000111011 - four 16-bit packs  */
22 /* 000111010 - two 32-bit packs  */
25 /* 000111101 - four 16-bit packs  */
28 /* 001001101 - four 16-bit expands  */
31 /* 001001011 - two 32-bit merges */
34 /* 000110001 - 8-by-16-bit partitioned product  */
37 /* 000110011 - 8-by-16-bit upper alpha partitioned product  */
40 /* 000110101 - 8-by-16-bit lower alpha partitioned product  */
43 /* 000110110 - upper 8-by-16-bit partitioned product  */
46 /* 000110111 - lower 8-by-16-bit partitioned product  */
49 /* 000111000 - upper 8-by-16-bit partitioned product  */
52 /* 000111001 - lower unsigned 8-by-16-bit partitioned product  */
55 /* 000101000 - four 16-bit compare; set rd if src1 > src2  */
58 /* 000101100 - two 32-bit compare; set rd if src1 > src2  */
61 /* 000100000 - four 16-bit compare; set rd if src1 <= src2  */
64 /* 000100100 - two 32-bit compare; set rd if src1 <= src2  */
67 /* 000100010 - four 16-bit compare; set rd if src1 != src2  */
70 /* 000100110 - two 32-bit compare; set rd if src1 != src2  */
73 /* 000101010 - four 16-bit compare; set rd if src1 == src2  */
76 /* 000101110 - two 32-bit compare; set rd if src1 == src2  */
79 /* 000000000 - Eight 8-bit edge boundary processing  */
82 /* 000000001 - Eight 8-bit edge boundary processing, no CC */
85 /* 000000010 - Eight 8-bit edge boundary processing, little-endian  */
88 /* 000000011 - Eight 8-bit edge boundary processing, little-endian, no CC  */
91 /* 000000100 - Four 16-bit edge boundary processing  */
94 /* 000000101 - Four 16-bit edge boundary processing, no CC  */
97 /* 000000110 - Four 16-bit edge boundary processing, little-endian  */
100 /* 000000111 - Four 16-bit edge boundary processing, little-endian, no CC  */
103 /* 000001000 - Two 32-bit edge boundary processing  */
106 /* 000001001 - Two 32-bit edge boundary processing, no CC  */
109 /* 000001010 - Two 32-bit edge boundary processing, little-endian  */
112 /* 000001011 - Two 32-bit edge boundary processing, little-endian, no CC  */
115 /* 000111110 - distance between 8 8-bit components  */
118 /* 000010000 - convert 8-bit 3-D address to blocked byte address  */
121 /* 000010010 - convert 16-bit 3-D address to blocked byte address  */
124 /* 000010100 - convert 32-bit 3-D address to blocked byte address  */
127 /* 000011001 - Set the GSR.MASK field in preparation for a BSHUFFLE  */
130 /* 001001100 - Permute bytes as specified by GSR.MASK  */
156 		return (!reg ? 0 : regs->u_regs[reg]);  in fetch_reg()
158 	fp = regs->u_regs[UREG_FP];  in fetch_reg()
160 	if (regs->tstate & TSTATE_PRIV) {  in fetch_reg()
163 		value = win->locals[reg - 16];  in fetch_reg()
167 		get_user(value, &win32->locals[reg - 16]);  in fetch_reg()
171 		get_user(value, &win->locals[reg - 16]);  in fetch_reg()
179 	unsigned long fp = regs->u_regs[UREG_FP];  in __fetch_reg_addr_user()
182 	BUG_ON(regs->tstate & TSTATE_PRIV);  in __fetch_reg_addr_user()
187 		return (unsigned long __user *)&win32->locals[reg - 16];  in __fetch_reg_addr_user()
191 		return &win->locals[reg - 16];  in __fetch_reg_addr_user()
199 	BUG_ON(regs->tstate & TSTATE_PRIV);  in __fetch_reg_addr_kern()
201 	return &regs->u_regs[reg];  in __fetch_reg_addr_kern()
213 		if (!test_thread_64bit_stack(regs->u_regs[UREG_FP]))  in store_reg()
226 	return *(unsigned long *) &f->regs[insn_regnum];  in fpd_regval()
235 	return (unsigned long *) &f->regs[insn_regnum];  in fpd_regaddr()
241 	return f->regs[insn_regnum];  in fps_regval()
247 	return &f->regs[insn_regnum];  in fps_regaddr()
285 static struct edge_tab edge32_tab[2] = {
289 static struct edge_tab edge32_tab_l[2] = {
334 		left = edge32_tab[(rs1 >> 2) & 0x1].left;  in edge()
335 		right = edge32_tab[(rs2 >> 2) & 0x1].right;  in edge()
340 		left = edge32_tab_l[(rs1 >> 2) & 0x1].left;  in edge()
341 		right = edge32_tab_l[(rs2 >> 2) & 0x1].right;  in edge()
361 		__asm__ __volatile__("subcc	%1, %2, %%g0\n\t"  in edge()
366 		tstate = regs->tstate & ~(TSTATE_XCC | TSTATE_ICC);  in edge()
367 		regs->tstate = tstate | (ccr << 32UL);  in edge()
382 	bits_mask = (1UL << bits) - 1UL;  in array()
385 		  (((rs1 >> 33) & 0x3) <<  2) |  in array()
392 		  (((rs1 >> 60) & 0xf)       << (17 + (2*bits))));  in array()
400 		rd_val <<= 2;  in array()
417 	gsr = current_thread_info()->gsr[0] & 0xffffffff;  in bmask()
419 	current_thread_info()->gsr[0] = gsr;  in bmask()
428 	bmask = current_thread_info()->gsr[0] >> 32UL;  in bshuffle()
441 			byte = (rs2 >> ((which-8)*8)) & 0xff;  in bshuffle()
463 		s1 = (rs1 >> (56 - (i * 8))) & 0xff;  in pdist()
464 		s2 = (rs2 >> (56 - (i * 8))) & 0xff;  in pdist()
467 		s1 -= s2;  in pdist()
482 	gsr = current_thread_info()->gsr[0];  in pformat()
513 		for (word = 0; word < 2; word++) {  in pformat()
536 		for (word = 0; word < 2; word++) {  in pformat()
542 			val = ((from_fixed < -32768) ?  in pformat()
543 			       -32768 :  in pformat()
682 		for (byte = 0; byte < 2; byte++) {  in pmul()
727 		for (i = 0; i < 2; i++) {  in pcmp()
732 				rd_val |= 2 >> i;  in pcmp()
747 		for (i = 0; i < 2; i++) {  in pcmp()
752 				rd_val |= 2 >> i;  in pcmp()
767 		for (i = 0; i < 2; i++) {  in pcmp()
772 				rd_val |= 2 >> i;  in pcmp()
787 		for (i = 0; i < 2; i++) {  in pcmp()
792 				rd_val |= 2 >> i;  in pcmp()
806 	unsigned long pc = regs->tpc;  in vis_emul()
809 	BUG_ON(regs->tstate & TSTATE_PRIV);  in vis_emul()
817 		return -EFAULT;  in vis_emul()
824 		return -EINVAL;  in vis_emul()
879 	/* Three-Dimensional Array Addressing Instructions  */  in vis_emul()
896 	regs->tpc = regs->tnpc;  in vis_emul()
897 	regs->tnpc += 4;  in vis_emul()