Lines Matching +full:0 +full:x5025000

19 		#clock-cells = <0>;
30 			reg = <0x3003000 0x1000>;
36 			reg = <0x3009800 0x4>;
38 			#size-cells = <0>;
40 			mux-mask = <0x80>;
43 			internal_mdio: mdio@0 {
45 				#size-cells = <0>;
46 				reg = <0>;
48 				internal_ephy: phy@0 {
56 				#size-cells = <0>;
57 				reg = <0x80>;
63 			reg = <0x3020000 0x1000>;
65 			#size-cells = <0>;
68 			porta: gpio-controller@0 {
73 				reg = <0>;
82 			reg = <0x3021000 0x1000>;
84 			#size-cells = <0>;
87 			portb: gpio-controller@0 {
92 				reg = <0>;
101 			reg = <0x3022000 0x1000>;
103 			#size-cells = <0>;
106 			portc: gpio-controller@0 {
111 				reg = <0>;
120 			reg = <0x3023000 0x1000>;
122 			#size-cells = <0>;
125 			portd: gpio-controller@0 {
130 				reg = <0>;
139 			reg = <0x030f0000 0x1000>;
143 			#size-cells = <0>;
146 			channel@0 {
147 				reg = <0>;
161 			reg = <0x04000000 0x10000>;
163 			#size-cells = <0>;
173 			reg = <0x04010000 0x10000>;
175 			#size-cells = <0>;
185 			reg = <0x04020000 0x10000>;
187 			#size-cells = <0>;
197 			reg = <0x04030000 0x10000>;
199 			#size-cells = <0>;
209 			reg = <0x04040000 0x10000>;
211 			#size-cells = <0>;
221 			reg = <0x04070000 0x10000>;
232 			snps,multicast-filter-bins = <0>;
245 				#size-cells = <0>;
259 				snps,blen = <16 8 4 0 0 0 0>;
267 			reg = <0x04140000 0x100>;
279 			reg = <0x04150000 0x100>;
291 			reg = <0x04160000 0x100>;
303 			reg = <0x04170000 0x100>;
315 			reg = <0x04180000 0x10000>;
317 			#size-cells = <0>;
327 			reg = <0x04190000 0x10000>;
329 			#size-cells = <0>;
339 			reg = <0x041a0000 0x10000>;
341 			#size-cells = <0>;
351 			reg = <0x041b0000 0x10000>;
353 			#size-cells = <0>;
363 			reg = <0x041c0000 0x100>;
375 			reg = <0x4310000 0x1000>;
385 			reg = <0x4320000 0x1000>;
395 			reg = <0x04330000 0x1000>;
403 			snps,priority = <0 1 2 3 4 5 6 7>;
411 			reg = <0x5025000 0x2000>;