Lines Matching +full:cdns +full:- +full:pcie +full:- +full:host
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy.h>
13 #include "k3-j722s.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,j722s-evm", "ti,j722s";
29 stdout-path = &main_uart0;
37 bootph-pre-ram;
40 reserved_memory: reserved-memory {
41 #address-cells = <2>;
42 #size-cells = <2>;
47 no-map;
52 no-map;
55 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
56 compatible = "shared-dma-pool";
58 no-map;
61 wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
62 compatible = "shared-dma-pool";
64 no-map;
67 mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
68 compatible = "shared-dma-pool";
70 no-map;
73 mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
74 compatible = "shared-dma-pool";
76 no-map;
79 main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
80 compatible = "shared-dma-pool";
82 no-map;
85 main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
86 compatible = "shared-dma-pool";
88 no-map;
91 c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
92 compatible = "shared-dma-pool";
94 no-map;
97 c7x_0_memory_region: c7x-memory@a3100000 {
98 compatible = "shared-dma-pool";
100 no-map;
103 c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
104 compatible = "shared-dma-pool";
106 no-map;
109 c7x_1_memory_region: c7x-memory@a4100000 {
110 compatible = "shared-dma-pool";
112 no-map;
115 rtos_ipc_memory_region: ipc-memories@a5000000 {
118 no-map;
122 vmain_pd: regulator-0 {
124 compatible = "regulator-fixed";
125 regulator-name = "vmain_pd";
126 regulator-min-microvolt = <5000000>;
127 regulator-max-microvolt = <5000000>;
128 regulator-always-on;
129 regulator-boot-on;
130 bootph-all;
133 vsys_5v0: regulator-vsys5v0 {
135 compatible = "regulator-fixed";
136 regulator-name = "vsys_5v0";
137 regulator-min-microvolt = <5000000>;
138 regulator-max-microvolt = <5000000>;
139 vin-supply = <&vmain_pd>;
140 regulator-always-on;
141 regulator-boot-on;
144 vdd_mmc1: regulator-mmc1 {
146 compatible = "regulator-fixed";
147 regulator-name = "vdd_mmc1";
148 regulator-min-microvolt = <3300000>;
149 regulator-max-microvolt = <3300000>;
150 regulator-boot-on;
151 enable-active-high;
153 bootph-all;
156 vdd_sd_dv: regulator-TLV71033 {
157 compatible = "regulator-gpio";
158 regulator-name = "tlv71033";
159 pinctrl-names = "default";
160 pinctrl-0 = <&vdd_sd_dv_pins_default>;
161 regulator-min-microvolt = <1800000>;
162 regulator-max-microvolt = <3300000>;
163 regulator-boot-on;
164 vin-supply = <&vsys_5v0>;
170 vsys_io_3v3: regulator-vsys-io-3v3 {
171 compatible = "regulator-fixed";
172 regulator-name = "vsys_io_3v3";
173 regulator-min-microvolt = <3300000>;
174 regulator-max-microvolt = <3300000>;
175 regulator-always-on;
176 regulator-boot-on;
179 vsys_io_1v8: regulator-vsys-io-1v8 {
180 compatible = "regulator-fixed";
181 regulator-name = "vsys_io_1v8";
182 regulator-min-microvolt = <1800000>;
183 regulator-max-microvolt = <1800000>;
184 regulator-always-on;
185 regulator-boot-on;
188 vsys_io_1v2: regulator-vsys-io-1v2 {
189 compatible = "regulator-fixed";
190 regulator-name = "vsys_io_1v2";
191 regulator-min-microvolt = <1200000>;
192 regulator-max-microvolt = <1200000>;
193 regulator-always-on;
194 regulator-boot-on;
198 compatible = "simple-audio-card";
199 simple-audio-card,name = "J722S-EVM";
200 simple-audio-card,widgets =
204 simple-audio-card,routing =
211 simple-audio-card,format = "dsp_b";
212 simple-audio-card,bitclock-master = <&sound_master>;
213 simple-audio-card,frame-master = <&sound_master>;
214 simple-audio-card,bitclock-inversion;
216 simple-audio-card,cpu {
217 sound-dai = <&mcasp1>;
220 sound_master: simple-audio-card,codec {
221 sound-dai = <&tlv320aic3106>;
226 transceiver0: can-phy0 {
228 #phy-cells = <0>;
229 max-bitrate = <5000000>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
232 standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>;
235 transceiver1: can-phy1 {
237 #phy-cells = <0>;
238 max-bitrate = <5000000>;
241 transceiver2: can-phy2 {
243 #phy-cells = <0>;
244 max-bitrate = <5000000>;
245 standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>;
251 main_mcan0_pins_default: main-mcan0-default-pins {
252 pinctrl-single,pins = <
258 main_i2c0_pins_default: main-i2c0-default-pins {
259 pinctrl-single,pins = <
263 bootph-all;
266 main_uart0_pins_default: main-uart0-default-pins {
267 pinctrl-single,pins = <
271 bootph-all;
274 main_uart5_pins_default: main-uart5-default-pins {
275 pinctrl-single,pins = <
281 vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
282 pinctrl-single,pins = <
285 bootph-all;
288 main_mmc1_pins_default: main-mmc1-default-pins {
289 pinctrl-single,pins = <
298 bootph-all;
301 mdio_pins_default: mdio-default-pins {
302 pinctrl-single,pins = <
308 ospi0_pins_default: ospi0-default-pins {
309 pinctrl-single,pins = <
322 bootph-all;
325 rgmii1_pins_default: rgmii1-default-pins {
326 pinctrl-single,pins = <
342 main_usb1_pins_default: main-usb1-default-pins {
343 pinctrl-single,pins = <
348 main_mcasp1_pins_default: main-mcasp1-default-pins {
349 pinctrl-single,pins = <
357 audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {
358 pinctrl-single,pins = <
366 pinctrl-names = "default";
367 pinctrl-0 = <&rgmii1_pins_default>;
372 pinctrl-names = "default";
373 pinctrl-0 = <&mdio_pins_default>;
375 cpsw3g_phy0: ethernet-phy@0 {
377 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
378 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
379 ti,min-output-impedance;
384 phy-mode = "rgmii-rxid";
385 phy-handle = <&cpsw3g_phy0>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&main_uart0_pins_default>;
397 bootph-all;
402 pinctrl-names = "default";
403 pinctrl-0 = <&main_uart5_pins_default>;
409 mcu_mcan0_pins_default: mcu-mcan0-default-pins {
410 pinctrl-single,pins = <
416 mcu_mcan1_pins_default: mcu-mcan1-default-pins {
417 pinctrl-single,pins = <
423 mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
424 pinctrl-single,pins = <
429 wkup_uart0_pins_default: wkup-uart0-default-pins {
430 pinctrl-single,pins = <
436 bootph-all;
439 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
440 pinctrl-single,pins = <
444 bootph-all;
450 pinctrl-names = "default";
451 pinctrl-0 = <&wkup_uart0_pins_default>;
453 bootph-all;
457 pinctrl-names = "default";
458 pinctrl-0 = <&wkup_i2c0_pins_default>;
459 clock-frequency = <400000>;
461 bootph-all;
466 pinctrl-names = "default";
467 pinctrl-0 = <&audio_ext_refclk1_pins_default>;
471 pinctrl-names = "default";
472 pinctrl-0 = <&main_i2c0_pins_default>;
473 clock-frequency = <400000>;
475 bootph-all;
480 gpio-controller;
481 #gpio-cells = <2>;
482 gpio-line-names = "TRC_MUX_SEL", "OSPI/ONAND_MUX_SEL",
495 p05-hog {
496 /* P05 - USB2.0_MUX_SEL */
497 gpio-hog;
499 output-high;
502 p01_hog: p01-hog {
503 /* P01 - TRC_MUX_SEL */
504 gpio-hog;
506 output-low;
507 line-name = "TRC_MUX_SEL";
510 p02_hog: p02-hog {
511 /* P02 - MCASP1_FET_SEL */
512 gpio-hog;
514 output-high;
515 line-name = "MCASP1_FET_SEL";
518 p13_hog: p13-hog {
519 /* P13 - GPIO_AUD_RSTn */
520 gpio-hog;
522 output-high;
523 line-name = "GPIO_AUD_RSTn";
527 tlv320aic3106: audio-codec@1b {
528 #sound-dai-cells = <0>;
531 ai3x-micbias-vg = <1>; /* 2.0V */
532 AVDD-supply = <&vsys_io_3v3>;
533 IOVDD-supply = <&vsys_io_3v3>;
534 DRVDD-supply = <&vsys_io_3v3>;
535 DVDD-supply = <&vsys_io_1v8>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&ospi0_pins_default>;
545 compatible = "jedec,spi-nor";
547 spi-tx-bus-width = <8>;
548 spi-rx-bus-width = <8>;
549 spi-max-frequency = <25000000>;
550 cdns,tshsl-ns = <60>;
551 cdns,tsd2d-ns = <60>;
552 cdns,tchsh-ns = <60>;
553 cdns,tslch-ns = <60>;
554 cdns,read-delay = <4>;
555 bootph-all;
558 compatible = "fixed-partitions";
559 #address-cells = <1>;
560 #size-cells = <1>;
573 label = "ospi.u-boot";
602 disable-wp;
603 bootph-all;
604 ti,driver-strength-ohm = <50>;
610 vmmc-supply = <&vdd_mmc1>;
611 vqmmc-supply = <&vdd_sd_dv>;
612 pinctrl-names = "default";
613 pinctrl-0 = <&main_mmc1_pins_default>;
614 ti,driver-strength-ohm = <50>;
615 disable-wp;
617 bootph-all;
623 mbox_wkup_r5_0: mbox-wkup-r5-0 {
624 ti,mbox-rx = <0 0 0>;
625 ti,mbox-tx = <1 0 0>;
632 mbox_mcu_r5_0: mbox-mcu-r5-0 {
633 ti,mbox-rx = <0 0 0>;
634 ti,mbox-tx = <1 0 0>;
641 mbox_c7x_0: mbox-c7x-0 {
642 ti,mbox-rx = <0 0 0>;
643 ti,mbox-tx = <1 0 0>;
650 mbox_main_r5_0: mbox-main-r5-0 {
651 ti,mbox-rx = <0 0 0>;
652 ti,mbox-tx = <1 0 0>;
655 mbox_c7x_1: mbox-c7x-1 {
656 ti,mbox-rx = <2 0 0>;
657 ti,mbox-tx = <3 0 0>;
680 memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
690 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
700 memory-region = <&main_r5fss0_core0_dma_memory_region>,
706 memory-region = <&c7x_0_dma_memory_region>,
713 memory-region = <&c7x_1_dma_memory_region>,
719 idle-states = <J722S_SERDES0_LANE0_USB>,
727 cdns,num-lanes = <1>;
728 #phy-cells = <0>;
729 cdns,phy-type = <PHY_TYPE_USB3>;
738 cdns,num-lanes = <1>;
739 #phy-cells = <0>;
740 cdns,phy-type = <PHY_TYPE_PCIE>;
746 reset-gpios = <&exp1 18 GPIO_ACTIVE_HIGH>;
748 phy-names = "pcie-phy";
753 ti,vbus-divider;
759 usb-role-switch;
763 pinctrl-names = "default";
764 pinctrl-0 = <&main_usb1_pins_default>;
765 ti,vbus-divider;
770 dr_mode = "host";
771 maximum-speed = "super-speed";
773 phy-names = "cdns3,usb3-phy";
778 #sound-dai-cells = <0>;
779 pinctrl-names = "default";
780 pinctrl-0 = <&main_mcasp1_pins_default>;
781 op-mode = <0>; /* MCASP_IIS_MODE */
782 tdm-slots = <2>;
783 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
792 pinctrl-names = "default";
793 pinctrl-0 = <&mcu_mcan0_pins_default>;
799 pinctrl-names = "default";
800 pinctrl-0 = <&mcu_mcan1_pins_default>;
806 pinctrl-names = "default";
807 pinctrl-0 = <&main_mcan0_pins_default>;