Lines Matching +full:i2c6 +full:- +full:pins
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
15 compatible = "renesas,rzv2n-evk", "renesas,r9a09g056n48", "renesas,r9a09g056";
24 i2c6 = &i2c6;
33 stdout-path = "serial0:115200n8";
42 reg_0p8v: regulator-0p8v {
43 compatible = "regulator-fixed";
44 regulator-name = "fixed-0.8V";
45 regulator-min-microvolt = <800000>;
46 regulator-max-microvolt = <800000>;
47 regulator-boot-on;
48 regulator-always-on;
51 reg_1p8v: regulator-1p8v {
52 compatible = "regulator-fixed";
53 regulator-name = "fixed-1.8V";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
56 regulator-boot-on;
57 regulator-always-on;
60 reg_3p3v: regulator-3p3v {
61 compatible = "regulator-fixed";
62 regulator-name = "fixed-3.3V";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 regulator-boot-on;
66 regulator-always-on;
69 vqmmc_sdhi1: regulator-vqmmc-sdhi1 {
70 compatible = "regulator-gpio";
71 regulator-name = "SDHI1 VqmmC";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <3300000>;
75 gpios-states = <0>;
80 x6: x6-clock {
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
83 clock-frequency = <32768>;
88 clock-frequency = <22579200>;
97 pinctrl-0 = <ð0_pins>;
98 pinctrl-names = "default";
99 phy-handle = <&phy0>;
100 phy-mode = "rgmii-id";
105 pinctrl-0 = <ð1_pins>;
106 pinctrl-names = "default";
107 phy-handle = <&phy1>;
108 phy-mode = "rgmii-id";
114 mali-supply = <®_0p8v>;
123 pinctrl-0 = <&i2c0_pins>;
124 pinctrl-names = "default";
125 clock-frequency = <400000>;
130 pinctrl-0 = <&i2c1_pins>;
131 pinctrl-names = "default";
132 clock-frequency = <400000>;
137 pinctrl-0 = <&i2c2_pins>;
138 pinctrl-names = "default";
139 clock-frequency = <400000>;
144 pinctrl-0 = <&i2c3_pins>;
145 pinctrl-names = "default";
146 clock-frequency = <400000>;
150 &i2c6 {
151 pinctrl-0 = <&i2c6_pins>;
152 pinctrl-names = "default";
153 clock-frequency = <400000>;
158 pinctrl-0 = <&i2c7_pins>;
159 pinctrl-names = "default";
160 clock-frequency = <400000>;
165 pinctrl-0 = <&i2c8_pins>;
166 pinctrl-names = "default";
167 clock-frequency = <400000>;
173 reg-names = "main", "rtc";
175 clock-names = "xin";
180 phy0: ethernet-phy@0 {
181 compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";
183 rxc-skew-psec = <0>;
184 txc-skew-psec = <0>;
185 rxdv-skew-psec = <0>;
186 txdv-skew-psec = <0>;
187 rxd0-skew-psec = <0>;
188 rxd1-skew-psec = <0>;
189 rxd2-skew-psec = <0>;
190 rxd3-skew-psec = <0>;
191 txd0-skew-psec = <0>;
192 txd1-skew-psec = <0>;
193 txd2-skew-psec = <0>;
194 txd3-skew-psec = <0>;
199 phy1: ethernet-phy@1 {
200 compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";
202 rxc-skew-psec = <0>;
203 txc-skew-psec = <0>;
204 rxdv-skew-psec = <0>;
205 txdv-skew-psec = <0>;
206 rxd0-skew-psec = <0>;
207 rxd1-skew-psec = <0>;
208 rxd2-skew-psec = <0>;
209 rxd3-skew-psec = <0>;
210 txd0-skew-psec = <0>;
211 txd1-skew-psec = <0>;
212 txd2-skew-psec = <0>;
213 txd3-skew-psec = <0>;
256 pins = "ET0_TXC_TXCLK";
257 output-enable;
261 pins = "ET1_TXC_TXCLK";
262 output-enable;
285 i2c6_pins: i2c6 {
288 /* There are no pull-up resistors on the EVK, so enable the internal pull-up */
289 bias-pull-up;
295 /* There are no pull-up resistors on the EVK, so enable the internal pull-up */
296 bias-pull-up;
305 pins = "SCIF_TXD", "SCIF_RXD";
306 renesas,output-impedance = <1>;
309 sd1-pwr-en-hog {
310 gpio-hog;
312 output-high;
313 line-name = "sd1_pwr_en";
317 sd1-cd {
321 sd1-clk {
322 pins = "SD1CLK";
323 renesas,output-impedance = <3>;
324 slew-rate = <0>;
327 sd1-dat-cmd {
328 pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";
329 input-enable;
330 renesas,output-impedance = <3>;
331 slew-rate = <0>;
347 pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
348 output-enable;
352 pins = "XSPI0_IO0", "XSPI0_IO1", "XSPI0_IO2", "XSPI0_IO3";
353 renesas,output-impedance = <3>;
359 clock-frequency = <24000000>;
363 clock-frequency = <32768>;
367 pinctrl-0 = <&scif_pins>;
368 pinctrl-names = "default";
373 pinctrl-0 = <&sdhi1_pins>;
374 pinctrl-1 = <&sdhi1_pins>;
375 pinctrl-names = "default", "state_uhs";
376 vmmc-supply = <®_3p3v>;
377 vqmmc-supply = <&vqmmc_sdhi1>;
378 bus-width = <4>;
379 sd-uhs-sdr50;
380 sd-uhs-sdr104;
389 pinctrl-0 = <&usb20_pins>;
390 pinctrl-names = "default";
400 pinctrl-0 = <&xspi_pins>;
401 pinctrl-names = "default";
407 assigned-clocks = <&cpg CPG_CORE R9A09G056_SPI_CLK_SPI>;
408 assigned-clock-rates = <133333334>;
412 compatible = "jedec,spi-nor";
414 vcc-supply = <®_1p8v>;
415 m25p,fast-read;
416 spi-tx-bus-width = <4>;
417 spi-rx-bus-width = <4>;
420 compatible = "fixed-partitions";
421 #address-cells = <1>;
422 #size-cells = <1>;