Lines Matching full:clkc

7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
127 		clocks = <&clkc CLKID_EFUSE>;
201 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
227 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
245 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
258 				clocks = <&clkc CLKID_USB1>;
285 			clocks = <&clkc CLKID_ETH>,
286 				 <&clkc CLKID_FCLK_DIV2>,
287 				 <&clkc CLKID_MPLL2>,
288 				 <&clkc CLKID_FCLK_DIV2>;
328 				clocks = <&clkc CLKID_RNG0>;
1248 				clkc: clock-controller {  label
1249 					compatible = "amlogic,axg-clkc";
1266 					clocks = <&clkc CLKID_VPU>,
1267 						 <&clkc CLKID_VAPB>;
1275 					assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1276 							  <&clkc CLKID_VPU_0>,
1277 							  <&clkc CLKID_VPU>, /* Glitch free mux */
1278 							  <&clkc CLKID_VAPB_0_SEL>,
1279 							  <&clkc CLKID_VAPB_0>,
1280 							  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1281 					assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
1283 								 <&clkc CLKID_VPU_0>,
1284 								 <&clkc CLKID_FCLK_DIV4>,
1286 								 <&clkc CLKID_VAPB_0>;
1315 			clocks = <&clkc CLKID_MIPI_DSI_PHY>;
1333 				compatible = "amlogic,axg-audio-clkc";
1337 				clocks = <&clkc CLKID_AUDIO>,
1338 					 <&clkc CLKID_MPLL0>,
1339 					 <&clkc CLKID_MPLL1>,
1340 					 <&clkc CLKID_MPLL2>,
1341 					 <&clkc CLKID_MPLL3>,
1342 					 <&clkc CLKID_HIFI_PLL>,
1343 					 <&clkc CLKID_FCLK_DIV3>,
1344 					 <&clkc CLKID_FCLK_DIV4>,
1345 					 <&clkc CLKID_GP0_PLL>;
1575 					clocks = <&xtal>, <&clkc CLKID_CLK81>;
1700 					 <&clkc CLKID_FCLK_DIV4>,
1701 					 <&clkc CLKID_FCLK_DIV5>;
1728 				clocks = <&clkc CLKID_AO_I2C>;
1739 					 <&clkc CLKID_FCLK_DIV4>,
1740 					 <&clkc CLKID_FCLK_DIV5>;
1771 			clocks = <&clkc CLKID_VAPB>;
1820 					 <&clkc CLKID_FCLK_DIV5>,
1821 					 <&clkc CLKID_FCLK_DIV4>,
1822 					 <&clkc CLKID_FCLK_DIV3>;
1831 					 <&clkc CLKID_FCLK_DIV5>,
1832 					 <&clkc CLKID_FCLK_DIV4>,
1833 					 <&clkc CLKID_FCLK_DIV3>;
1842 				clocks = <&clkc CLKID_SPICC0>;
1853 				clocks = <&clkc CLKID_SPICC1>;
1869 				clocks = <&clkc CLKID_I2C>;
1879 				clocks = <&clkc CLKID_I2C>;
1889 				clocks = <&clkc CLKID_I2C>;
1899 				clocks = <&clkc CLKID_I2C>;
1910 				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
1919 				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
1937 				clocks = <&clkc CLKID_SD_EMMC_B>,
1938 					<&clkc CLKID_SD_EMMC_B_CLK0>,
1939 					<&clkc CLKID_FCLK_DIV2>;
1949 				clocks = <&clkc CLKID_SD_EMMC_C>,
1950 					<&clkc CLKID_SD_EMMC_C_CLK0>,
1951 					<&clkc CLKID_FCLK_DIV2>;
1966 				clocks = <&clkc CLKID_SD_EMMC_C>,
1967 					 <&clkc CLKID_FCLK_DIV2>;
1975 				clocks = <&clkc CLKID_USB>;