Lines Matching +full:sun50i +full:- +full:h6 +full:- +full:iommu
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,cortex-a53";
28 enable-method = "psci";
30 #cooling-cells = <2>;
31 i-cache-size = <0x8000>;
32 i-cache-line-size = <64>;
33 i-cache-sets = <256>;
34 d-cache-size = <0x8000>;
35 d-cache-line-size = <64>;
36 d-cache-sets = <128>;
37 next-level-cache = <&l2_cache>;
41 compatible = "arm,cortex-a53";
44 enable-method = "psci";
46 #cooling-cells = <2>;
47 i-cache-size = <0x8000>;
48 i-cache-line-size = <64>;
49 i-cache-sets = <256>;
50 d-cache-size = <0x8000>;
51 d-cache-line-size = <64>;
52 d-cache-sets = <128>;
53 next-level-cache = <&l2_cache>;
57 compatible = "arm,cortex-a53";
60 enable-method = "psci";
62 #cooling-cells = <2>;
63 i-cache-size = <0x8000>;
64 i-cache-line-size = <64>;
65 i-cache-sets = <256>;
66 d-cache-size = <0x8000>;
67 d-cache-line-size = <64>;
68 d-cache-sets = <128>;
69 next-level-cache = <&l2_cache>;
73 compatible = "arm,cortex-a53";
76 enable-method = "psci";
78 #cooling-cells = <2>;
79 i-cache-size = <0x8000>;
80 i-cache-line-size = <64>;
81 i-cache-sets = <256>;
82 d-cache-size = <0x8000>;
83 d-cache-line-size = <64>;
84 d-cache-sets = <128>;
85 next-level-cache = <&l2_cache>;
88 l2_cache: l2-cache {
90 cache-level = <2>;
91 cache-unified;
92 cache-size = <0x80000>;
93 cache-line-size = <64>;
94 cache-sets = <512>;
98 de: display-engine {
99 compatible = "allwinner,sun50i-h6-display-engine";
104 osc24M: osc24M-clk {
105 #clock-cells = <0>;
106 compatible = "fixed-clock";
107 clock-frequency = <24000000>;
108 clock-output-names = "osc24M";
112 compatible = "arm,cortex-a53-pmu";
117 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
121 compatible = "arm,psci-0.2";
126 compatible = "arm,armv8-timer";
127 arm,no-tick-in-suspend;
139 compatible = "simple-bus";
140 #address-cells = <1>;
141 #size-cells = <1>;
145 compatible = "allwinner,sun50i-h6-de3",
146 "allwinner,sun50i-a64-de2";
149 #address-cells = <1>;
150 #size-cells = <1>;
154 compatible = "allwinner,sun50i-h6-de3-clk";
158 clock-names = "bus",
161 #clock-cells = <1>;
162 #reset-cells = <1>;
166 compatible = "allwinner,sun50i-h6-de3-mixer-0";
170 clock-names = "bus",
173 iommus = <&iommu 0>;
176 #address-cells = <1>;
177 #size-cells = <0>;
183 remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
190 video-codec-g2@1c00000 {
191 compatible = "allwinner,sun50i-h6-vpu-g2";
195 clock-names = "bus", "mod";
197 iommus = <&iommu 5>;
200 video-codec@1c0e000 {
201 compatible = "allwinner,sun50i-h6-video-engine";
205 clock-names = "ahb", "mod", "ram";
209 iommus = <&iommu 3>;
213 compatible = "allwinner,sun50i-h6-mali",
214 "arm,mali-t720";
219 interrupt-names = "job", "mmu", "gpu";
221 clock-names = "core", "bus";
223 #cooling-cells = <2>;
228 compatible = "allwinner,sun50i-h6-crypto";
232 clock-names = "bus", "mod", "ram";
237 compatible = "allwinner,sun50i-h6-system-control",
238 "allwinner,sun50i-a64-system-control";
240 #address-cells = <1>;
241 #size-cells = <1>;
245 compatible = "mmio-sram";
247 #address-cells = <1>;
248 #size-cells = <1>;
251 de2_sram: sram-section@0 {
252 compatible = "allwinner,sun50i-h6-sram-c",
253 "allwinner,sun50i-a64-sram-c";
259 compatible = "mmio-sram";
261 #address-cells = <1>;
262 #size-cells = <1>;
265 ve_sram: sram-section@0 {
266 compatible = "allwinner,sun50i-h6-sram-c1",
267 "allwinner,sun4i-a10-sram-c1";
274 compatible = "allwinner,sun50i-h6-ccu";
277 clock-names = "hosc", "losc", "iosc";
278 #clock-cells = <1>;
279 #reset-cells = <1>;
282 dma: dma-controller@3002000 {
283 compatible = "allwinner,sun50i-h6-dma";
287 clock-names = "bus", "mbus";
288 dma-channels = <16>;
289 dma-requests = <46>;
291 #dma-cells = <1>;
295 compatible = "allwinner,sun50i-h6-msgbox",
296 "allwinner,sun6i-a31-msgbox";
301 #mbox-cells = <1>;
305 compatible = "allwinner,sun50i-h6-sid";
307 #address-cells = <1>;
308 #size-cells = <1>;
310 ths_calibration: thermal-sensor-calibration@14 {
314 cpu_speed_grade: cpu-speed-grade@1c {
320 compatible = "allwinner,sun50i-h6-timer",
321 "allwinner,sun8i-a23-timer";
329 compatible = "allwinner,sun50i-h6-wdt",
330 "allwinner,sun6i-a31-wdt";
334 /* Broken on some H6 boards */
339 compatible = "allwinner,sun50i-h6-pwm";
342 clock-names = "mod", "bus";
344 #pwm-cells = <3>;
349 compatible = "allwinner,sun50i-h6-pinctrl";
351 interrupt-parent = <&r_intc>;
357 clock-names = "apb", "hosc", "losc";
358 gpio-controller;
359 #gpio-cells = <3>;
360 interrupt-controller;
361 #interrupt-cells = <3>;
363 ext_rgmii_pins: rgmii-pins {
368 drive-strength = <40>;
371 hdmi_pins: hdmi-pins {
376 i2c0_pins: i2c0-pins {
381 i2c1_pins: i2c1-pins {
386 i2c2_pins: i2c2-pins {
391 mmc0_pins: mmc0-pins {
395 drive-strength = <30>;
396 bias-pull-up;
399 /omit-if-no-ref/
400 mmc1_pins: mmc1-pins {
404 drive-strength = <30>;
405 bias-pull-up;
408 mmc2_pins: mmc2-pins {
413 drive-strength = <30>;
414 bias-pull-up;
417 /omit-if-no-ref/
418 spi0_pins: spi0-pins {
423 /* pin shared with MMC2-CMD (eMMC) */
424 /omit-if-no-ref/
425 spi0_cs_pin: spi0-cs-pin {
430 /omit-if-no-ref/
431 spi1_pins: spi1-pins {
436 /omit-if-no-ref/
437 spi1_cs_pin: spi1-cs-pin {
442 /omit-if-no-ref/
443 spdif_tx_pin: spdif-tx-pin {
448 uart0_ph_pins: uart0-ph-pins {
453 uart1_pins: uart1-pins {
458 uart1_rts_cts_pins: uart1-rts-cts-pins {
464 gic: interrupt-controller@3021000 {
465 compatible = "arm,gic-400";
471 interrupt-controller;
472 #interrupt-cells = <3>;
475 iommu: iommu@30f0000 { label
476 compatible = "allwinner,sun50i-h6-iommu";
481 #iommu-cells = <1>;
485 compatible = "allwinner,sun50i-h6-mmc",
486 "allwinner,sun50i-a64-mmc";
489 clock-names = "ahb", "mmc";
491 reset-names = "ahb";
493 pinctrl-names = "default";
494 pinctrl-0 = <&mmc0_pins>;
495 max-frequency = <150000000>;
497 #address-cells = <1>;
498 #size-cells = <0>;
502 compatible = "allwinner,sun50i-h6-mmc",
503 "allwinner,sun50i-a64-mmc";
506 clock-names = "ahb", "mmc";
508 reset-names = "ahb";
510 pinctrl-names = "default";
511 pinctrl-0 = <&mmc1_pins>;
512 max-frequency = <150000000>;
514 #address-cells = <1>;
515 #size-cells = <0>;
519 compatible = "allwinner,sun50i-h6-emmc",
520 "allwinner,sun50i-a64-emmc";
523 clock-names = "ahb", "mmc";
525 reset-names = "ahb";
527 pinctrl-names = "default";
528 pinctrl-0 = <&mmc2_pins>;
529 max-frequency = <150000000>;
531 #address-cells = <1>;
532 #size-cells = <0>;
536 compatible = "snps,dw-apb-uart";
539 reg-shift = <2>;
540 reg-io-width = <4>;
547 compatible = "snps,dw-apb-uart";
550 reg-shift = <2>;
551 reg-io-width = <4>;
558 compatible = "snps,dw-apb-uart";
561 reg-shift = <2>;
562 reg-io-width = <4>;
569 compatible = "snps,dw-apb-uart";
572 reg-shift = <2>;
573 reg-io-width = <4>;
580 compatible = "allwinner,sun50i-h6-i2c",
581 "allwinner,sun6i-a31-i2c";
586 pinctrl-names = "default";
587 pinctrl-0 = <&i2c0_pins>;
589 #address-cells = <1>;
590 #size-cells = <0>;
594 compatible = "allwinner,sun50i-h6-i2c",
595 "allwinner,sun6i-a31-i2c";
600 pinctrl-names = "default";
601 pinctrl-0 = <&i2c1_pins>;
603 #address-cells = <1>;
604 #size-cells = <0>;
608 compatible = "allwinner,sun50i-h6-i2c",
609 "allwinner,sun6i-a31-i2c";
614 pinctrl-names = "default";
615 pinctrl-0 = <&i2c2_pins>;
617 #address-cells = <1>;
618 #size-cells = <0>;
622 compatible = "allwinner,sun50i-h6-spi",
623 "allwinner,sun8i-h3-spi";
627 clock-names = "ahb", "mod";
629 dma-names = "rx", "tx";
632 #address-cells = <1>;
633 #size-cells = <0>;
637 compatible = "allwinner,sun50i-h6-spi",
638 "allwinner,sun8i-h3-spi";
642 clock-names = "ahb", "mod";
644 dma-names = "rx", "tx";
647 #address-cells = <1>;
648 #size-cells = <0>;
652 compatible = "allwinner,sun50i-h6-emac",
653 "allwinner,sun50i-a64-emac";
657 interrupt-names = "macirq";
659 reset-names = "stmmaceth";
661 clock-names = "stmmaceth";
665 compatible = "snps,dwmac-mdio";
666 #address-cells = <1>;
667 #size-cells = <0>;
672 #sound-dai-cells = <0>;
673 compatible = "allwinner,sun50i-h6-i2s";
677 clock-names = "apb", "mod";
680 dma-names = "rx", "tx";
685 #sound-dai-cells = <0>;
686 compatible = "allwinner,sun50i-h6-spdif";
690 clock-names = "apb", "spdif";
693 dma-names = "rx", "tx";
698 compatible = "allwinner,sun50i-h6-musb",
699 "allwinner,sun8i-a33-musb";
704 interrupt-names = "mc";
706 phy-names = "usb";
712 compatible = "allwinner,sun50i-h6-usb-phy";
716 reg-names = "phy_ctrl",
721 clock-names = "usb0_phy",
725 reset-names = "usb0_reset",
728 #phy-cells = <1>;
732 compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
741 phy-names = "usb";
746 compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
753 phy-names = "usb";
764 clock-names = "ref", "bus_early", "suspend";
769 * to have a USB Type-B port routed to the port.
776 phy-names = "usb3-phy";
781 compatible = "allwinner,sun50i-h6-usb3-phy";
785 #phy-cells = <0>;
790 compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
799 phy-names = "usb";
804 compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
811 phy-names = "usb";
816 compatible = "allwinner,sun50i-h6-dw-hdmi";
818 reg-io-width = <1>;
823 clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
824 "hdcp-bus";
826 reset-names = "ctrl", "hdcp";
828 phy-names = "phy";
829 pinctrl-names = "default";
830 pinctrl-0 = <&hdmi_pins>;
834 #address-cells = <1>;
835 #size-cells = <0>;
841 remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
851 hdmi_phy: hdmi-phy@6010000 {
852 compatible = "allwinner,sun50i-h6-hdmi-phy";
855 clock-names = "bus", "mod";
857 reset-names = "phy";
858 #phy-cells = <0>;
861 tcon_top: tcon-top@6510000 {
862 compatible = "allwinner,sun50i-h6-tcon-top";
866 clock-names = "bus",
867 "tcon-tv0";
868 clock-output-names = "tcon-top-tv0";
870 #clock-cells = <1>;
873 #address-cells = <1>;
874 #size-cells = <0>;
877 #address-cells = <1>;
878 #size-cells = <0>;
883 remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
888 #address-cells = <1>;
889 #size-cells = <0>;
894 remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
899 #address-cells = <1>;
900 #size-cells = <0>;
905 remote-endpoint = <&tcon_tv_out_tcon_top>;
913 remote-endpoint = <&hdmi_in_tcon_top>;
919 tcon_tv: lcd-controller@6515000 {
920 compatible = "allwinner,sun50i-h6-tcon-tv",
921 "allwinner,sun8i-r40-tcon-tv";
926 clock-names = "ahb",
927 "tcon-ch1";
929 reset-names = "lcd";
932 #address-cells = <1>;
933 #size-cells = <0>;
939 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
944 #address-cells = <1>;
945 #size-cells = <0>;
950 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
957 compatible = "allwinner,sun50i-h6-rtc";
959 interrupt-parent = <&r_intc>;
962 clock-output-names = "osc32k", "osc32k-out", "iosc";
963 #clock-cells = <1>;
967 compatible = "allwinner,sun50i-h6-r-ccu";
971 clock-names = "hosc", "losc", "iosc", "pll-periph";
972 #clock-cells = <1>;
973 #reset-cells = <1>;
977 compatible = "allwinner,sun50i-h6-wdt",
978 "allwinner,sun6i-a31-wdt";
984 r_intc: interrupt-controller@7021000 {
985 compatible = "allwinner,sun50i-h6-r-intc";
986 interrupt-controller;
987 #interrupt-cells = <3>;
993 compatible = "allwinner,sun50i-h6-r-pinctrl";
995 interrupt-parent = <&r_intc>;
1000 clock-names = "apb", "hosc", "losc";
1001 gpio-controller;
1002 #gpio-cells = <3>;
1003 interrupt-controller;
1004 #interrupt-cells = <3>;
1006 r_i2c_pins: r-i2c-pins {
1011 r_ir_rx_pin: r-ir-rx-pin {
1016 r_rsb_pins: r-rsb-pins {
1023 compatible = "allwinner,sun50i-h6-ir",
1024 "allwinner,sun6i-a31-ir";
1029 clock-names = "apb", "ir";
1031 pinctrl-names = "default";
1032 pinctrl-0 = <&r_ir_rx_pin>;
1037 compatible = "allwinner,sun50i-h6-i2c",
1038 "allwinner,sun6i-a31-i2c";
1043 pinctrl-names = "default";
1044 pinctrl-0 = <&r_i2c_pins>;
1046 #address-cells = <1>;
1047 #size-cells = <0>;
1051 compatible = "allwinner,sun8i-a23-rsb";
1055 clock-frequency = <3000000>;
1057 pinctrl-names = "default";
1058 pinctrl-0 = <&r_rsb_pins>;
1060 #address-cells = <1>;
1061 #size-cells = <0>;
1064 ths: thermal-sensor@5070400 {
1065 compatible = "allwinner,sun50i-h6-ths";
1069 clock-names = "bus";
1071 nvmem-cells = <&ths_calibration>;
1072 nvmem-cell-names = "calibration";
1073 #thermal-sensor-cells = <1>;
1077 thermal-zones {
1078 cpu-thermal {
1079 polling-delay-passive = <0>;
1080 polling-delay = <0>;
1081 thermal-sensors = <&ths 0>;
1084 cpu_alert: cpu-alert {
1090 cpu-crit {
1097 cooling-maps {
1100 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1108 gpu-thermal {
1109 polling-delay-passive = <1000>;
1110 polling-delay = <2000>;
1111 thermal-sensors = <&ths 1>;
1114 gpu_alert0: gpu-alert-0 {
1120 gpu_alert1: gpu-alert-1 {
1126 gpu_alert2: gpu-alert-2 {
1132 gpu-crit {
1139 cooling-maps {
1143 cooling-device = <&gpu 1 THERMAL_NO_LIMIT>;
1149 cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
1155 cooling-device = <&gpu 3 THERMAL_NO_LIMIT>;