Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:tcon
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,cortex-a53";
28 enable-method = "psci";
30 clock-latency-ns = <244144>; /* 8 32k periods */
31 #cooling-cells = <2>;
32 i-cache-size = <0x8000>;
33 i-cache-line-size = <64>;
34 i-cache-sets = <256>;
35 d-cache-size = <0x8000>;
36 d-cache-line-size = <64>;
37 d-cache-sets = <128>;
38 next-level-cache = <&l2_cache>;
42 compatible = "arm,cortex-a53";
45 enable-method = "psci";
47 clock-latency-ns = <244144>; /* 8 32k periods */
48 #cooling-cells = <2>;
49 i-cache-size = <0x8000>;
50 i-cache-line-size = <64>;
51 i-cache-sets = <256>;
52 d-cache-size = <0x8000>;
53 d-cache-line-size = <64>;
54 d-cache-sets = <128>;
55 next-level-cache = <&l2_cache>;
59 compatible = "arm,cortex-a53";
62 enable-method = "psci";
64 clock-latency-ns = <244144>; /* 8 32k periods */
65 #cooling-cells = <2>;
66 i-cache-size = <0x8000>;
67 i-cache-line-size = <64>;
68 i-cache-sets = <256>;
69 d-cache-size = <0x8000>;
70 d-cache-line-size = <64>;
71 d-cache-sets = <128>;
72 next-level-cache = <&l2_cache>;
76 compatible = "arm,cortex-a53";
79 enable-method = "psci";
81 clock-latency-ns = <244144>; /* 8 32k periods */
82 #cooling-cells = <2>;
83 i-cache-size = <0x8000>;
84 i-cache-line-size = <64>;
85 i-cache-sets = <256>;
86 d-cache-size = <0x8000>;
87 d-cache-line-size = <64>;
88 d-cache-sets = <128>;
89 next-level-cache = <&l2_cache>;
92 l2_cache: l2-cache {
94 cache-level = <2>;
95 cache-unified;
96 cache-size = <0x80000>;
97 cache-line-size = <64>;
98 cache-sets = <512>;
102 de: display-engine {
103 compatible = "allwinner,sun50i-h6-display-engine";
108 osc24M: osc24M-clk {
109 #clock-cells = <0>;
110 compatible = "fixed-clock";
111 clock-frequency = <24000000>;
112 clock-output-names = "osc24M";
116 compatible = "arm,cortex-a53-pmu";
121 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
125 compatible = "arm,psci-0.2";
130 compatible = "arm,armv8-timer";
131 arm,no-tick-in-suspend;
143 compatible = "simple-bus";
144 #address-cells = <1>;
145 #size-cells = <1>;
149 compatible = "allwinner,sun50i-h6-de3",
150 "allwinner,sun50i-a64-de2";
153 #address-cells = <1>;
154 #size-cells = <1>;
158 compatible = "allwinner,sun50i-h6-de3-clk";
162 clock-names = "bus",
165 #clock-cells = <1>;
166 #reset-cells = <1>;
170 compatible = "allwinner,sun50i-h6-de3-mixer-0";
174 clock-names = "bus",
180 #address-cells = <1>;
181 #size-cells = <0>;
187 remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
194 video-codec-g2@1c00000 {
195 compatible = "allwinner,sun50i-h6-vpu-g2";
199 clock-names = "bus", "mod";
204 video-codec@1c0e000 {
205 compatible = "allwinner,sun50i-h6-video-engine";
209 clock-names = "ahb", "mod", "ram";
217 compatible = "allwinner,sun50i-h6-mali",
218 "arm,mali-t720";
223 interrupt-names = "job", "mmu", "gpu";
225 clock-names = "core", "bus";
227 #cooling-cells = <2>;
232 compatible = "allwinner,sun50i-h6-crypto";
236 clock-names = "bus", "mod", "ram";
241 compatible = "allwinner,sun50i-h6-system-control",
242 "allwinner,sun50i-a64-system-control";
244 #address-cells = <1>;
245 #size-cells = <1>;
249 compatible = "mmio-sram";
251 #address-cells = <1>;
252 #size-cells = <1>;
255 de2_sram: sram-section@0 {
256 compatible = "allwinner,sun50i-h6-sram-c",
257 "allwinner,sun50i-a64-sram-c";
263 compatible = "mmio-sram";
265 #address-cells = <1>;
266 #size-cells = <1>;
269 ve_sram: sram-section@0 {
270 compatible = "allwinner,sun50i-h6-sram-c1",
271 "allwinner,sun4i-a10-sram-c1";
278 compatible = "allwinner,sun50i-h6-ccu";
281 clock-names = "hosc", "losc", "iosc";
282 #clock-cells = <1>;
283 #reset-cells = <1>;
286 dma: dma-controller@3002000 {
287 compatible = "allwinner,sun50i-h6-dma";
291 clock-names = "bus", "mbus";
292 dma-channels = <16>;
293 dma-requests = <46>;
295 #dma-cells = <1>;
299 compatible = "allwinner,sun50i-h6-msgbox",
300 "allwinner,sun6i-a31-msgbox";
305 #mbox-cells = <1>;
309 compatible = "allwinner,sun50i-h6-sid";
311 #address-cells = <1>;
312 #size-cells = <1>;
314 ths_calibration: thermal-sensor-calibration@14 {
318 cpu_speed_grade: cpu-speed-grade@1c {
324 compatible = "allwinner,sun50i-h6-timer",
325 "allwinner,sun8i-a23-timer";
333 compatible = "allwinner,sun50i-h6-wdt",
334 "allwinner,sun6i-a31-wdt";
343 compatible = "allwinner,sun50i-h6-pwm";
346 clock-names = "mod", "bus";
348 #pwm-cells = <3>;
353 compatible = "allwinner,sun50i-h6-pinctrl";
355 interrupt-parent = <&r_intc>;
361 clock-names = "apb", "hosc", "losc";
362 gpio-controller;
363 #gpio-cells = <3>;
364 interrupt-controller;
365 #interrupt-cells = <3>;
367 ext_rgmii_pins: rgmii-pins {
372 drive-strength = <40>;
375 hdmi_pins: hdmi-pins {
380 i2c0_pins: i2c0-pins {
385 i2c1_pins: i2c1-pins {
390 i2c2_pins: i2c2-pins {
395 mmc0_pins: mmc0-pins {
399 drive-strength = <30>;
400 bias-pull-up;
403 /omit-if-no-ref/
404 mmc1_pins: mmc1-pins {
408 drive-strength = <30>;
409 bias-pull-up;
412 mmc2_pins: mmc2-pins {
417 drive-strength = <30>;
418 bias-pull-up;
421 /omit-if-no-ref/
422 spi0_pins: spi0-pins {
427 /* pin shared with MMC2-CMD (eMMC) */
428 /omit-if-no-ref/
429 spi0_cs_pin: spi0-cs-pin {
434 /omit-if-no-ref/
435 spi1_pins: spi1-pins {
440 /omit-if-no-ref/
441 spi1_cs_pin: spi1-cs-pin {
446 /omit-if-no-ref/
447 spdif_tx_pin: spdif-tx-pin {
452 uart0_ph_pins: uart0-ph-pins {
457 uart1_pins: uart1-pins {
462 uart1_rts_cts_pins: uart1-rts-cts-pins {
468 gic: interrupt-controller@3021000 {
469 compatible = "arm,gic-400";
475 interrupt-controller;
476 #interrupt-cells = <3>;
480 compatible = "allwinner,sun50i-h6-iommu";
485 #iommu-cells = <1>;
489 compatible = "allwinner,sun50i-h6-mmc",
490 "allwinner,sun50i-a64-mmc";
493 clock-names = "ahb", "mmc";
495 reset-names = "ahb";
497 pinctrl-names = "default";
498 pinctrl-0 = <&mmc0_pins>;
499 max-frequency = <150000000>;
501 #address-cells = <1>;
502 #size-cells = <0>;
506 compatible = "allwinner,sun50i-h6-mmc",
507 "allwinner,sun50i-a64-mmc";
510 clock-names = "ahb", "mmc";
512 reset-names = "ahb";
514 pinctrl-names = "default";
515 pinctrl-0 = <&mmc1_pins>;
516 max-frequency = <150000000>;
518 #address-cells = <1>;
519 #size-cells = <0>;
523 compatible = "allwinner,sun50i-h6-emmc",
524 "allwinner,sun50i-a64-emmc";
527 clock-names = "ahb", "mmc";
529 reset-names = "ahb";
531 pinctrl-names = "default";
532 pinctrl-0 = <&mmc2_pins>;
533 max-frequency = <150000000>;
535 #address-cells = <1>;
536 #size-cells = <0>;
540 compatible = "snps,dw-apb-uart";
543 reg-shift = <2>;
544 reg-io-width = <4>;
551 compatible = "snps,dw-apb-uart";
554 reg-shift = <2>;
555 reg-io-width = <4>;
562 compatible = "snps,dw-apb-uart";
565 reg-shift = <2>;
566 reg-io-width = <4>;
573 compatible = "snps,dw-apb-uart";
576 reg-shift = <2>;
577 reg-io-width = <4>;
584 compatible = "allwinner,sun50i-h6-i2c",
585 "allwinner,sun6i-a31-i2c";
590 pinctrl-names = "default";
591 pinctrl-0 = <&i2c0_pins>;
593 #address-cells = <1>;
594 #size-cells = <0>;
598 compatible = "allwinner,sun50i-h6-i2c",
599 "allwinner,sun6i-a31-i2c";
604 pinctrl-names = "default";
605 pinctrl-0 = <&i2c1_pins>;
607 #address-cells = <1>;
608 #size-cells = <0>;
612 compatible = "allwinner,sun50i-h6-i2c",
613 "allwinner,sun6i-a31-i2c";
618 pinctrl-names = "default";
619 pinctrl-0 = <&i2c2_pins>;
621 #address-cells = <1>;
622 #size-cells = <0>;
626 compatible = "allwinner,sun50i-h6-spi",
627 "allwinner,sun8i-h3-spi";
631 clock-names = "ahb", "mod";
633 dma-names = "rx", "tx";
636 #address-cells = <1>;
637 #size-cells = <0>;
641 compatible = "allwinner,sun50i-h6-spi",
642 "allwinner,sun8i-h3-spi";
646 clock-names = "ahb", "mod";
648 dma-names = "rx", "tx";
651 #address-cells = <1>;
652 #size-cells = <0>;
656 compatible = "allwinner,sun50i-h6-emac",
657 "allwinner,sun50i-a64-emac";
661 interrupt-names = "macirq";
663 reset-names = "stmmaceth";
665 clock-names = "stmmaceth";
669 compatible = "snps,dwmac-mdio";
670 #address-cells = <1>;
671 #size-cells = <0>;
676 #sound-dai-cells = <0>;
677 compatible = "allwinner,sun50i-h6-i2s";
681 clock-names = "apb", "mod";
684 dma-names = "rx", "tx";
689 #sound-dai-cells = <0>;
690 compatible = "allwinner,sun50i-h6-spdif";
694 clock-names = "apb", "spdif";
697 dma-names = "rx", "tx";
702 compatible = "allwinner,sun50i-h6-musb",
703 "allwinner,sun8i-a33-musb";
708 interrupt-names = "mc";
710 phy-names = "usb";
716 compatible = "allwinner,sun50i-h6-usb-phy";
720 reg-names = "phy_ctrl",
725 clock-names = "usb0_phy",
729 reset-names = "usb0_reset",
732 #phy-cells = <1>;
736 compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
745 phy-names = "usb";
750 compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
757 phy-names = "usb";
768 clock-names = "ref", "bus_early", "suspend";
773 * to have a USB Type-B port routed to the port.
780 phy-names = "usb3-phy";
785 compatible = "allwinner,sun50i-h6-usb3-phy";
789 #phy-cells = <0>;
794 compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
803 phy-names = "usb";
808 compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
815 phy-names = "usb";
820 compatible = "allwinner,sun50i-h6-dw-hdmi";
822 reg-io-width = <1>;
827 clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
828 "hdcp-bus";
830 reset-names = "ctrl", "hdcp";
832 phy-names = "phy";
833 pinctrl-names = "default";
834 pinctrl-0 = <&hdmi_pins>;
838 #address-cells = <1>;
839 #size-cells = <0>;
845 remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
855 hdmi_phy: hdmi-phy@6010000 {
856 compatible = "allwinner,sun50i-h6-hdmi-phy";
859 clock-names = "bus", "mod";
861 reset-names = "phy";
862 #phy-cells = <0>;
865 tcon_top: tcon-top@6510000 {
866 compatible = "allwinner,sun50i-h6-tcon-top";
870 clock-names = "bus",
871 "tcon-tv0";
872 clock-output-names = "tcon-top-tv0";
874 #clock-cells = <1>;
877 #address-cells = <1>;
878 #size-cells = <0>;
881 #address-cells = <1>;
882 #size-cells = <0>;
887 remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
892 #address-cells = <1>;
893 #size-cells = <0>;
898 remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
903 #address-cells = <1>;
904 #size-cells = <0>;
909 remote-endpoint = <&tcon_tv_out_tcon_top>;
917 remote-endpoint = <&hdmi_in_tcon_top>;
923 tcon_tv: lcd-controller@6515000 {
924 compatible = "allwinner,sun50i-h6-tcon-tv",
925 "allwinner,sun8i-r40-tcon-tv";
930 clock-names = "ahb",
931 "tcon-ch1";
933 reset-names = "lcd";
936 #address-cells = <1>;
937 #size-cells = <0>;
943 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
948 #address-cells = <1>;
949 #size-cells = <0>;
954 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
961 compatible = "allwinner,sun50i-h6-rtc";
963 interrupt-parent = <&r_intc>;
966 clock-output-names = "osc32k", "osc32k-out", "iosc";
967 #clock-cells = <1>;
971 compatible = "allwinner,sun50i-h6-r-ccu";
975 clock-names = "hosc", "losc", "iosc", "pll-periph";
976 #clock-cells = <1>;
977 #reset-cells = <1>;
981 compatible = "allwinner,sun50i-h6-wdt",
982 "allwinner,sun6i-a31-wdt";
988 r_intc: interrupt-controller@7021000 {
989 compatible = "allwinner,sun50i-h6-r-intc";
990 interrupt-controller;
991 #interrupt-cells = <3>;
997 compatible = "allwinner,sun50i-h6-r-pinctrl";
999 interrupt-parent = <&r_intc>;
1004 clock-names = "apb", "hosc", "losc";
1005 gpio-controller;
1006 #gpio-cells = <3>;
1007 interrupt-controller;
1008 #interrupt-cells = <3>;
1010 r_i2c_pins: r-i2c-pins {
1015 r_ir_rx_pin: r-ir-rx-pin {
1020 r_rsb_pins: r-rsb-pins {
1027 compatible = "allwinner,sun50i-h6-ir",
1028 "allwinner,sun6i-a31-ir";
1033 clock-names = "apb", "ir";
1035 pinctrl-names = "default";
1036 pinctrl-0 = <&r_ir_rx_pin>;
1041 compatible = "allwinner,sun50i-h6-i2c",
1042 "allwinner,sun6i-a31-i2c";
1047 pinctrl-names = "default";
1048 pinctrl-0 = <&r_i2c_pins>;
1050 #address-cells = <1>;
1051 #size-cells = <0>;
1055 compatible = "allwinner,sun8i-a23-rsb";
1059 clock-frequency = <3000000>;
1061 pinctrl-names = "default";
1062 pinctrl-0 = <&r_rsb_pins>;
1064 #address-cells = <1>;
1065 #size-cells = <0>;
1068 ths: thermal-sensor@5070400 {
1069 compatible = "allwinner,sun50i-h6-ths";
1073 clock-names = "bus";
1075 nvmem-cells = <&ths_calibration>;
1076 nvmem-cell-names = "calibration";
1077 #thermal-sensor-cells = <1>;
1081 thermal-zones {
1082 cpu-thermal {
1083 polling-delay-passive = <0>;
1084 polling-delay = <0>;
1085 thermal-sensors = <&ths 0>;
1088 cpu_alert: cpu-alert {
1094 cpu-crit {
1101 cooling-maps {
1104 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1112 gpu-thermal {
1113 polling-delay-passive = <1000>;
1114 polling-delay = <2000>;
1115 thermal-sensors = <&ths 1>;
1118 gpu_alert0: gpu-alert-0 {
1124 gpu_alert1: gpu-alert-1 {
1130 gpu_alert2: gpu-alert-2 {
1136 gpu-crit {
1143 cooling-maps {
1147 cooling-device = <&gpu 1 THERMAL_NO_LIMIT>;
1153 cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
1159 cooling-device = <&gpu 3 THERMAL_NO_LIMIT>;