Lines Matching full:cortex
461 …bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is acce…
466 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
469 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
483 …bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to th…
488 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
505 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
510 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
513 If a Cortex-A53 processor is executing a store or prefetch for
528 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
533 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
550 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
554 erratum 832075 on Cortex-A57 parts up to r1p2.
556 Affected Cortex-A57 parts might deadlock when exclusive load/store
568 …bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a…
572 erratum 834220 on Cortex-A57 parts up to r1p2.
574 Affected Cortex-A57 parts might report a Stage 2 translation
588 …bool "Cortex-A57/A72: 1742098: ELR recorded incorrectly on interrupt taken between cryptographic i…
593 workaround erratum 1742098 on Cortex-A57 and Cortex-A72.
604 bool "Cortex-A53: 845719: a load might read incorrect data"
609 erratum 845719 on Cortex-A53 parts up to r0p4.
611 When running a compat (AArch32) userspace on an affected Cortex-A53
625 bool "Cortex-A53: 843419: A load or store might access an incorrect address"
628 This option links the kernel with '--fix-cortex-a53-843419' and
631 Cortex-A53 parts up to r0p4.
636 …bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorre…
639 This option adds a workaround for ARM Cortex-A55 Erratum 1024718.
641 Affected Cortex-A55 cores (all revisions) could cause incorrect
650 …bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 mi…
654 This option adds a workaround for ARM Cortex-A76/Neoverse-N1
657 Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
667 …bool "Cortex-A76: 1165522: Speculative AT instruction using out-of-context translation regime coul…
671 This option adds a workaround for ARM Cortex-A76 erratum 1165522.
673 Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with
680 …bool "Cortex-A57/A72: 1319537: Speculative AT instruction using out-of-context translation regime …
684 This option adds work arounds for ARM Cortex-A57 erratum 1319537
687 Cortex-A57 and A72 cores could end-up with corrupted TLBs by
693 …bool "Cortex-A55: 1530923: Speculative AT instruction using out-of-context translation regime coul…
697 This option adds a workaround for ARM Cortex-A55 erratum 1530923.
699 Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with
709 …bool "Cortex-A55: Completion of affected memory accesses might not be guaranteed by completion of …
712 This option adds a workaround for ARM Cortex-A55 erratum #2441007.
714 Under very rare circumstances, affected Cortex-A55 CPUs
725 …bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-a…
728 This option adds a workaround for ARM Cortex-A76 erratum 1286807.
730 On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
742 bool "Cortex-A76: Software Step might prevent interrupt recognition"
745 This option adds a workaround for Arm Cortex-A76 erratum 1463225.
747 On the affected Cortex-A76 cores (r0p0 to r3p1), software stepping
775 …bool "Cortex-A77: 1508412: workaround deadlock on sequence of NC/Device load and store exclusive o…
778 This option adds a workaround for Arm Cortex-A77 erratum 1508412.
780 Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
798 bool "Cortex-A510: 2051678: disable Hardware Update of the page table dirty bit"
801 This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
802 Affected Cortex-A510 might not respect the ordering rules for
809 bool "Cortex-A510: 2077057: workaround software-step corrupting SPSR_EL2"
812 This option adds the workaround for ARM Cortex-A510 erratum 2077057.
813 Affected Cortex-A510 may corrupt SPSR_EL2 when the a step exception is
826 bool "Cortex-A510: 2658417: remove BF16 support due to incorrect result"
829 This option adds the workaround for ARM Cortex-A510 erratum 2658417.
830 Affected Cortex-A510 (r0p0 to r1p1) may produce the wrong result for
839 bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode"
844 This option adds the workaround for ARM Cortex-A710/X2 erratum 2119858.
846 Affected Cortex-A710/X2 cores could overwrite up to 3 cache lines of trace
878 bool "Cortex-A710: 2054223: workaround TSB instruction failing to flush trace"
882 Enable workaround for ARM Cortex-A710 erratum 2054223
929 bool "Cortex-A710/X2: 2224489: workaround TRBE writing to address out-of-range"
934 This option adds the workaround for ARM Cortex-A710/X2 erratum 2224489.
936 Affected Cortex-A710/X2 cores might write to an out-of-range address, not reserved
947 …bool "Cortex-A510: Completion of affected memory accesses might not be guaranteed by completion of…
950 This option adds a workaround for ARM Cortex-A510 erratum #2441009.
952 Under very rare circumstances, affected Cortex-A510 CPUs
963 bool "Cortex-A510: 2064142: workaround TRBE register writes while disabled"
967 This option adds the workaround for ARM Cortex-A510 erratum 2064142.
969 Affected Cortex-A510 core might fail to write into system registers after the
981 bool "Cortex-A510: 2038923: workaround TRBE corruption with enable"
985 This option adds the workaround for ARM Cortex-A510 erratum 2038923.
987 Affected Cortex-A510 core might cause an inconsistent view on whether trace is
1004 bool "Cortex-A510: 1902691: workaround TRBE trace corruption"
1008 This option adds the workaround for ARM Cortex-A510 erratum 1902691.
1010 Affected Cortex-A510 core might cause trace data corruption, when being written
1022 bool "Cortex-A510: 2457168: workaround for AMEVCNTR01 incrementing incorrectly"
1026 This option adds the workaround for ARM Cortex-A510 erratum 2457168.
1029 as the system counter. On affected Cortex-A510 cores AMEVCNTR01 increments
1039 bool "Cortex-A715: 2645198: Workaround possible [ESR|FAR]_ELx corruption"
1042 This option adds the workaround for ARM Cortex-A715 erratum 2645198.
1044 If a Cortex-A715 cpu sees a page mapping permissions change from executable
1058 bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load"
1062 This option adds the workaround for ARM Cortex-A520 erratum 2966298.
1064 On an affected Cortex-A520 core, a speculatively executed unprivileged
1072 bool "Cortex-A510: 3117295: workaround for speculatively executed unprivileged load"
1076 This option adds the workaround for ARM Cortex-A510 erratum 3117295.
1078 On an affected Cortex-A510 core, a speculatively executed unprivileged
1086 bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing"
1091 * ARM Cortex-A76 erratum 3324349
1092 * ARM Cortex-A77 erratum 3324348
1093 * ARM Cortex-A78 erratum 3324344
1094 * ARM Cortex-A78C erratum 3324346
1095 * ARM Cortex-A78C erratum 3324347
1096 * ARM Cortex-A710 erratam 3324338
1097 * ARM Cortex-A715 errartum 3456084
1098 * ARM Cortex-A720 erratum 3456091
1099 * ARM Cortex-A725 erratum 3456106
1100 * ARM Cortex-X1 erratum 3324344
1101 * ARM Cortex-X1C erratum 3324346
1102 * ARM Cortex-X2 erratum 3324338
1103 * ARM Cortex-X3 erratum 3324335
1104 * ARM Cortex-X4 erratum 3194386
1105 * ARM Cortex-X925 erratum 3324334