Lines Matching +full:mii +full:- +full:rt
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
42 #size-cells = <0>;
44 compatible = "arm,cortex-a9";
45 enable-method = "ti,am4372";
50 clock-names = "cpu";
52 operating-points-v2 = <&cpu0_opp_table>;
54 clock-latency = <300000>; /* From omap-cpufreq driver */
55 cpu-idle-states = <&mpu_gate>;
58 idle-states {
60 compatible = "arm,idle-state";
61 entry-latency-us = <40>;
62 exit-latency-us = <100>;
63 min-residency-us = <300>;
64 local-timer-stop;
69 cpu0_opp_table: opp-table {
70 compatible = "operating-points-v2-ti-cpu";
73 opp-50-300000000 {
75 opp-hz = /bits/ 64 <300000000>;
76 opp-microvolt = <950000 931000 969000>;
77 opp-supported-hw = <0xFF 0x01>;
78 opp-suspend;
81 opp-100-600000000 {
83 opp-hz = /bits/ 64 <600000000>;
84 opp-microvolt = <1100000 1078000 1122000>;
85 opp-supported-hw = <0xFF 0x04>;
88 opp-120-720000000 {
90 opp-hz = /bits/ 64 <720000000>;
91 opp-microvolt = <1200000 1176000 1224000>;
92 opp-supported-hw = <0xFF 0x08>;
95 opp-800000000 {
97 opp-hz = /bits/ 64 <800000000>;
98 opp-microvolt = <1260000 1234800 1285200>;
99 opp-supported-hw = <0xFF 0x10>;
102 opp-1000000000 {
104 opp-hz = /bits/ 64 <1000000000>;
105 opp-microvolt = <1325000 1298500 1351500>;
106 opp-supported-hw = <0xFF 0x20>;
111 compatible = "ti,omap-infra";
114 gic: interrupt-controller@48241000 {
115 compatible = "arm,cortex-a9-gic";
116 interrupt-controller;
117 #interrupt-cells = <3>;
120 interrupt-parent = <&gic>;
123 wakeupgen: interrupt-controller@48281000 {
124 compatible = "ti,omap4-wugen-mpu";
125 interrupt-controller;
126 #interrupt-cells = <3>;
128 interrupt-parent = <&gic>;
132 compatible = "arm,cortex-a9-scu";
137 compatible = "arm,cortex-a9-global-timer";
140 interrupt-parent = <&gic>;
145 compatible = "arm,cortex-a9-twd-timer";
148 interrupt-parent = <&gic>;
152 cache-controller@48242000 {
153 compatible = "arm,pl310-cache";
155 cache-unified;
156 cache-level = <2>;
160 compatible = "simple-pm-bus";
161 power-domains = <&prm_per>;
163 clock-names = "fck";
164 #address-cells = <1>;
165 #size-cells = <1>;
167 ti,no-idle;
169 l3-noc@44000000 {
170 compatible = "ti,am4372-l3-noc";
184 target-module@4c000000 {
185 compatible = "ti,sysc-omap4-simple", "ti,sysc";
187 reg-names = "rev";
189 clock-names = "fck";
190 ti,no-idle;
191 #address-cells = <1>;
192 #size-cells = <1>;
196 compatible = "ti,emif-am4372";
204 target-module@49000000 {
205 compatible = "ti,sysc-omap4", "ti,sysc";
207 reg-names = "rev";
209 clock-names = "fck";
210 #address-cells = <1>;
211 #size-cells = <1>;
215 compatible = "ti,edma3-tpcc";
217 reg-names = "edma3_cc";
221 interrupt-names = "edma3_ccint", "edma3_mperr",
223 dma-requests = <64>;
224 #dma-cells = <2>;
229 ti,edma-memcpy-channels = <58 59>;
233 target-module@49800000 {
234 compatible = "ti,sysc-omap4", "ti,sysc";
237 reg-names = "rev", "sysc";
238 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
239 ti,sysc-midle = <SYSC_IDLE_FORCE>;
240 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
243 clock-names = "fck";
244 #address-cells = <1>;
245 #size-cells = <1>;
249 compatible = "ti,edma3-tptc";
252 interrupt-names = "edma3_tcerrint";
256 target-module@49900000 {
257 compatible = "ti,sysc-omap4", "ti,sysc";
260 reg-names = "rev", "sysc";
261 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
262 ti,sysc-midle = <SYSC_IDLE_FORCE>;
263 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
266 clock-names = "fck";
267 #address-cells = <1>;
268 #size-cells = <1>;
272 compatible = "ti,edma3-tptc";
275 interrupt-names = "edma3_tcerrint";
279 target-module@49a00000 {
280 compatible = "ti,sysc-omap4", "ti,sysc";
283 reg-names = "rev", "sysc";
284 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
285 ti,sysc-midle = <SYSC_IDLE_FORCE>;
286 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
289 clock-names = "fck";
290 #address-cells = <1>;
291 #size-cells = <1>;
295 compatible = "ti,edma3-tptc";
298 interrupt-names = "edma3_tcerrint";
302 target-module@47810000 {
303 compatible = "ti,sysc-omap2", "ti,sysc";
307 reg-names = "rev", "sysc", "syss";
308 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
312 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
315 ti,syss-mask = <1>;
317 clock-names = "fck";
318 #address-cells = <1>;
319 #size-cells = <1>;
323 compatible = "ti,am437-sdhci";
324 ti,needs-special-reset;
331 sham_target: target-module@53100000 {
332 compatible = "ti,sysc-omap3-sham", "ti,sysc";
336 reg-names = "rev", "sysc", "syss";
337 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
339 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
342 ti,syss-mask = <1>;
345 clock-names = "fck";
346 #address-cells = <1>;
347 #size-cells = <1>;
351 compatible = "ti,omap5-sham";
354 dma-names = "rx";
359 aes_target: target-module@53501000 {
360 compatible = "ti,sysc-omap2", "ti,sysc";
364 reg-names = "rev", "sysc", "syss";
365 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
367 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
371 ti,syss-mask = <1>;
374 clock-names = "fck";
375 #address-cells = <1>;
376 #size-cells = <1>;
380 compatible = "ti,omap4-aes";
385 dma-names = "tx", "rx";
389 des_target: target-module@53701000 {
390 compatible = "ti,sysc-omap2", "ti,sysc";
394 reg-names = "rev", "sysc", "syss";
395 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
397 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
401 ti,syss-mask = <1>;
404 clock-names = "fck";
405 #address-cells = <1>;
406 #size-cells = <1>;
410 compatible = "ti,omap4-des";
415 dma-names = "tx", "rx";
419 pruss_tm: target-module@54400000 {
420 compatible = "ti,sysc-pruss", "ti,sysc";
423 reg-names = "rev", "sysc";
424 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
426 ti,sysc-midle = <SYSC_IDLE_FORCE>,
429 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
433 clock-names = "fck";
435 reset-names = "rstctrl";
436 #address-cells = <1>;
437 #size-cells = <1>;
441 compatible = "ti,am4376-pruss1";
443 #address-cells = <1>;
444 #size-cells = <1>;
451 reg-names = "dram0", "dram1",
456 compatible = "ti,pruss-cfg", "syscon";
458 #address-cells = <1>;
459 #size-cells = <1>;
463 #address-cells = <1>;
464 #size-cells = <0>;
466 pruss1_iepclk_mux: iepclk-mux@30 {
468 #clock-cells = <0>;
475 pruss1_mii_rt: mii-rt@32000 {
476 compatible = "ti,pruss-mii", "syscon";
480 pruss1_intc: interrupt-controller@20000 {
481 compatible = "ti,pruss-intc";
483 interrupt-controller;
484 #interrupt-cells = <3>;
492 interrupt-names = "host_intr0", "host_intr1",
496 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
500 compatible = "ti,am4376-pru";
504 reg-names = "iram", "control", "debug";
505 firmware-name = "am437x-pru1_0-fw";
509 compatible = "ti,am4376-pru";
513 reg-names = "iram", "control", "debug";
514 firmware-name = "am437x-pru1_1-fw";
521 clock-names = "fck";
523 #address-cells = <1>;
524 #size-cells = <0>;
529 compatible = "ti,am4376-pruss0";
531 #address-cells = <1>;
532 #size-cells = <1>;
538 reg-names = "dram0", "dram1";
542 compatible = "ti,pruss-cfg", "syscon";
544 #address-cells = <1>;
545 #size-cells = <1>;
549 #address-cells = <1>;
550 #size-cells = <0>;
552 pruss0_iepclk_mux: iepclk-mux@30 {
554 #clock-cells = <0>;
561 pruss0_mii_rt: mii-rt@72000 {
562 compatible = "ti,pruss-mii", "syscon";
567 pruss0_intc: interrupt-controller@60000 {
568 compatible = "ti,pruss-intc";
570 interrupt-controller;
571 #interrupt-cells = <3>;
579 interrupt-names = "host_intr0", "host_intr1",
583 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
587 compatible = "ti,am4376-pru";
591 reg-names = "iram", "control", "debug";
592 firmware-name = "am437x-pru0_0-fw";
596 compatible = "ti,am4376-pru";
600 reg-names = "iram", "control", "debug";
601 firmware-name = "am437x-pru0_1-fw";
606 target-module@50000000 {
607 compatible = "ti,sysc-omap2", "ti,sysc";
611 reg-names = "rev", "sysc", "syss";
612 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
615 ti,syss-mask = <1>;
617 clock-names = "fck";
618 #address-cells = <1>;
619 #size-cells = <1>;
624 compatible = "ti,am3352-gpmc";
626 dma-names = "rxtx";
628 clock-names = "fck";
631 gpmc,num-cs = <7>;
632 gpmc,num-waitpins = <2>;
633 #address-cells = <2>;
634 #size-cells = <1>;
635 interrupt-controller;
636 #interrupt-cells = <2>;
637 gpio-controller;
638 #gpio-cells = <2>;
643 target-module@47900000 {
644 compatible = "ti,sysc-omap4", "ti,sysc";
647 reg-names = "rev", "sysc";
648 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
653 clock-names = "fck";
654 #address-cells = <1>;
655 #size-cells = <1>;
660 compatible = "ti,am4372-qspi";
663 reg-names = "qspi_base", "qspi_mmap";
665 clock-names = "fck";
666 #address-cells = <1>;
667 #size-cells = <0>;
669 num-cs = <4>;
673 target-module@40300000 {
674 compatible = "ti,sysc-omap4-simple", "ti,sysc";
676 clock-names = "fck";
677 ti,no-idle;
678 #address-cells = <1>;
679 #size-cells = <1>;
683 compatible = "mmio-sram";
686 #address-cells = <1>;
687 #size-cells = <1>;
689 pm_sram_code: pm-code-sram@0 {
692 protect-exec;
695 pm_sram_data: pm-data-sram@1000 {
703 target-module@56000000 {
704 compatible = "ti,sysc-omap4", "ti,sysc";
707 reg-names = "rev", "sysc";
708 ti,sysc-midle = <SYSC_IDLE_FORCE>,
711 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
715 clock-names = "fck";
716 power-domains = <&prm_gfx>;
718 reset-names = "rstctrl";
719 #address-cells = <1>;
720 #size-cells = <1>;
724 compatible = "ti,omap3630-gpu", "img,powervr-sgx530";
732 #include "am437x-l4.dtsi"
733 #include "am43xx-clocks.dtsi"
737 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
739 #power-domain-cells = <0>;
743 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
745 #power-domain-cells = <0>;
746 #reset-cells = <1>;
750 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
752 #power-domain-cells = <0>;
756 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
758 #power-domain-cells = <0>;
762 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
764 #power-domain-cells = <0>;
768 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
770 #reset-cells = <1>;
771 #power-domain-cells = <0>;
775 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
777 #reset-cells = <1>;
778 #power-domain-cells = <0>;
782 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
784 #reset-cells = <1>;
788 /* Preferred always-on timer for clocksource */
790 ti,no-reset-on-init;
791 ti,no-idle;
794 clock-names = "fck", "ick";
796 assigned-clocks = <&timer1_fck>;
797 assigned-clock-parents = <&sys_clkin_ck>;
803 ti,no-reset-on-init;
804 ti,no-idle;
807 clock-names = "fck", "ick";
809 assigned-clocks = <&timer2_fck>;
810 assigned-clock-parents = <&sys_clkin_ck>;