Lines Matching +full:at91sam9g46 +full:- +full:sha
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7d65.dtsi - Device Tree Include file for SAMA7D65 SoC
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/mfd/at91-usart.h>
21 #address-cells = <1>;
22 #size-cells = <1>;
23 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a7";
34 clock-names = "cpu";
35 d-cache-size = <0x8000>; // L1, 32 KB
36 i-cache-size = <0x8000>; // L1, 32 KB
37 next-level-cache = <&L2>;
39 L2: l2-cache {
41 cache-level = <2>;
42 cache-size = <0x40000>; // L2, 256 KB
43 cache-unified;
49 main_xtal: clock-mainxtal {
50 compatible = "fixed-clock";
51 clock-output-names = "main_xtal";
52 #clock-cells = <0>;
55 slow_xtal: clock-slowxtal {
56 compatible = "fixed-clock";
57 clock-output-names = "slow_xtal";
58 #clock-cells = <0>;
63 compatible = "mmio-sram";
66 #address-cells = <1>;
67 #size-cells = <1>;
71 compatible = "simple-bus";
73 #address-cells = <1>;
74 #size-cells = <1>;
77 compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram";
81 #address-cells = <1>;
82 #size-cells = <1>;
83 no-memory-wc;
86 secumod: security-module@e0004000 {
87 compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon";
89 gpio-controller;
90 #gpio-cells = <2>;
94 compatible = "microchip,sama7d65-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
99 compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl";
107 interrupt-controller;
108 #interrupt-cells = <2>;
109 gpio-controller;
110 #gpio-cells = <2>;
113 pmc: clock-controller@e0018000 {
114 compatible = "microchip,sama7d65-pmc", "syscon";
117 #clock-cells = <2>;
119 clock-names = "td_slck", "md_slck", "main_xtal";
123 compatible = "microchip,sama7d65-wdt", "microchip,sama7g5-wdt";
129 reset_controller: reset-controller@e001d100 {
130 compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc";
132 #reset-cells = <1>;
137 compatible = "microchip,sama7d65-shdwc", "microchip,sama7g5-shdwc", "syscon";
140 #address-cells = <1>;
141 #size-cells = <0>;
142 atmel,wakeup-rtc-timer;
143 atmel,wakeup-rtt-timer;
148 compatible = "microchip,sama7d65-rtt", "atmel,at91sam9260-rtt";
154 clk32k: clock-controller@e001d500 {
155 compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc";
158 #clock-cells = <1>;
162 compatible = "microchip,sama7d65-gpbr", "syscon";
167 compatible = "microchip,sama7d65-rtc", "microchip,sam9x60-rtc";
174 compatible = "microchip,sama7d65-chipid";
181 reg-names = "m_can", "message_ram";
184 interrupt-names = "int0", "int1";
186 clock-names = "hclk", "cclk";
187 assigned-clocks = <&pmc PMC_TYPE_GCK 58>;
188 assigned-clock-rates = <40000000>;
189 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
190 bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
197 reg-names = "m_can", "message_ram";
200 interrupt-names = "int0", "int1";
202 clock-names = "hclk", "cclk";
203 assigned-clocks = <&pmc PMC_TYPE_GCK 59>;
204 assigned-clock-rates = <40000000>;
205 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
206 bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
213 reg-names = "m_can", "message_ram";
216 interrupt-names = "int0", "int1";
218 clock-names = "hclk", "cclk";
219 assigned-clocks = <&pmc PMC_TYPE_GCK 60>;
220 assigned-clock-rates = <40000000>;
221 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
222 bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
229 reg-names = "m_can", "message_ram";
232 interrupt-names = "int0", "int1";
234 clock-names = "hclk", "cclk";
235 assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
236 assigned-clock-rates = <40000000>;
237 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
238 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
245 reg-names = "m_can", "message_ram";
248 interrupt-names = "int0", "int1";
250 clock-names = "hclk", "cclk";
251 assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
252 assigned-clock-rates = <40000000>;
253 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
254 bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
258 dma2: dma-controller@e1200000 {
259 compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
262 #dma-cells = <1>;
264 clock-names = "dma_clk";
265 dma-requests = <0>;
270 compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci";
274 clock-names = "hclock", "multclk";
275 assigned-clocks = <&pmc PMC_TYPE_GCK 76>;
276 assigned-clock-rates = <200000000>;
277 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK1>;
282 compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes";
286 clock-names = "aes_clk";
289 dma-names = "tx", "rx";
292 sha: crypto@e1604000 { label
293 compatible = "microchip,sama7d65-sha", "atmel,at91sam9g46-sha";
297 clock-names = "sha_clk";
299 dma-names = "tx";
303 compatible = "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes";
307 clock-names = "tdes_clk";
310 dma-names = "tx", "rx";
314 compatible = "microchip,sama7d65-trng", "microchip,sam9x60-trng";
320 dma0: dma-controller@e1610000 {
321 compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
324 #dma-cells = <1>;
326 clock-names = "dma_clk";
330 dma1: dma-controller@e1614000 {
331 compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
334 #dma-cells = <1>;
336 clock-names = "dma_clk";
341 compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";
350 clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
351 assigned-clocks = <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>;
352 assigned-clock-rates = <125000000>, <200000000>;
357 compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";
366 clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
367 assigned-clocks = <&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>;
368 assigned-clock-rates = <125000000>, <200000000>;
373 compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
377 clock-names = "pclk", "gclk";
381 compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
385 clock-names = "pclk", "gclk";
389 compatible = "microchip,sama7d65-pwm", "atmel,sama5d2-pwm";
393 #pwm-cells = <3>;
398 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
402 #address-cells = <1>;
403 #size-cells = <1>;
407 compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
411 clock-names = "usart";
414 dma-names = "tx", "rx";
415 atmel,use-dma-rx;
416 atmel,use-dma-tx;
417 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
422 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
426 #address-cells = <1>;
427 #size-cells = <0>;
428 atmel,fifo-size = <32>;
431 dma-names = "tx", "rx";
437 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
441 #address-cells = <1>;
442 #size-cells = <1>;
446 compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
450 clock-names = "spi_clk";
451 #address-cells = <1>;
452 #size-cells = <0>;
455 dma-names = "tx", "rx";
456 atmel,fifo-size = <32>;
461 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
465 #address-cells = <1>;
466 #size-cells = <0>;
469 dma-names = "tx", "rx";
470 atmel,fifo-size = <32>;
476 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
480 #address-cells = <1>;
481 #size-cells = <1>;
485 compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
489 clock-names = "usart";
492 dma-names = "tx", "rx";
493 atmel,use-dma-rx;
494 atmel,use-dma-tx;
495 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
501 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
505 #address-cells = <1>;
506 #size-cells = <1>;
510 compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
514 clock-names = "usart";
517 dma-names = "tx", "rx";
518 atmel,use-dma-rx;
519 atmel,use-dma-tx;
520 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
525 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
529 #address-cells = <1>;
530 #size-cells = <1>;
533 dma-names = "tx", "rx";
534 atmel,fifo-size = <32>;
541 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
545 #address-cells = <1>;
546 #size-cells = <1>;
550 compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
554 clock-names = "usart";
557 dma-names = "tx", "rx";
558 atmel,use-dma-rx;
559 atmel,use-dma-tx;
560 atmel,fifo-size = <32>;
561 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
566 compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
570 clock-names = "spi_clk";
571 #address-cells = <1>;
572 #size-cells = <0>;
575 dma-names = "tx", "rx";
576 atmel,fifo-size = <32>;
582 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
586 #address-cells = <1>;
587 #size-cells = <1>;
591 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
595 #address-cells = <1>;
596 #size-cells = <0>;
599 dma-names = "tx", "rx";
600 atmel,fifo-size = <32>;
606 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
609 #address-cells = <1>;
610 #size-cells = <1>;
615 compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
619 clock-names = "usart";
620 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
621 atmel,fifo-size = <32>;
627 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
631 #address-cells = <1>;
632 #size-cells = <1>;
636 compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
640 clock-names = "usart";
643 dma-names = "tx", "rx";
644 atmel,use-dma-rx;
645 atmel,use-dma-tx;
646 atmel,fifo-size = <32>;
647 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
653 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
657 #address-cells = <1>;
658 #size-cells = <1>;
662 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
666 #address-cells = <1>;
667 #size-cells = <0>;
670 dma-names = "tx", "rx";
671 atmel,fifo-size = <32>;
677 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
681 #address-cells = <1>;
682 #size-cells = <1>;
686 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
690 #address-cells = <1>;
691 #size-cells = <0>;
694 dma-names = "tx", "rx";
695 atmel,fifo-size = <32>;
701 compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
705 #address-cells = <1>;
706 #size-cells = <1>;
710 compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
714 #address-cells = <1>;
715 #size-cells = <0>;
716 atmel,fifo-size = <32>;
722 compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc";
727 compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy";
731 gic: interrupt-controller@e8c11000 {
732 compatible = "arm,cortex-a7-gic";
735 #interrupt-cells = <3>;
736 #address-cells = <0>;
737 interrupt-controller;