Lines Matching full:arm
2 config ARM config
166 The ARM series is a line of low-power-consumption RISC chip designs
167 licensed by ARM Ltd and targeted at embedded applications and
168 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
169 manufactured, but legacy ARM-based PC hardware remains popular in
170 Europe. There is an ARM Linux project with a web page at
171 <http://www.arm.linux.org.uk/>.
345 In general, all Arm machines can be supported in a single
355 source "arch/arm/Kconfig.platforms"
362 source "arch/arm/mach-actions/Kconfig"
364 source "arch/arm/mach-alpine/Kconfig"
366 source "arch/arm/mach-artpec/Kconfig"
368 source "arch/arm/mach-aspeed/Kconfig"
370 source "arch/arm/mach-at91/Kconfig"
372 source "arch/arm/mach-axxia/Kconfig"
374 source "arch/arm/mach-bcm/Kconfig"
376 source "arch/arm/mach-berlin/Kconfig"
378 source "arch/arm/mach-clps711x/Kconfig"
380 source "arch/arm/mach-davinci/Kconfig"
382 source "arch/arm/mach-digicolor/Kconfig"
384 source "arch/arm/mach-dove/Kconfig"
386 source "arch/arm/mach-ep93xx/Kconfig"
388 source "arch/arm/mach-exynos/Kconfig"
390 source "arch/arm/mach-footbridge/Kconfig"
392 source "arch/arm/mach-gemini/Kconfig"
394 source "arch/arm/mach-highbank/Kconfig"
396 source "arch/arm/mach-hisi/Kconfig"
398 source "arch/arm/mach-imx/Kconfig"
400 source "arch/arm/mach-ixp4xx/Kconfig"
402 source "arch/arm/mach-keystone/Kconfig"
404 source "arch/arm/mach-lpc32xx/Kconfig"
406 source "arch/arm/mach-mediatek/Kconfig"
408 source "arch/arm/mach-meson/Kconfig"
410 source "arch/arm/mach-milbeaut/Kconfig"
412 source "arch/arm/mach-mmp/Kconfig"
414 source "arch/arm/mach-mstar/Kconfig"
416 source "arch/arm/mach-mv78xx0/Kconfig"
418 source "arch/arm/mach-mvebu/Kconfig"
420 source "arch/arm/mach-mxs/Kconfig"
422 source "arch/arm/mach-nomadik/Kconfig"
424 source "arch/arm/mach-npcm/Kconfig"
426 source "arch/arm/mach-omap1/Kconfig"
428 source "arch/arm/mach-omap2/Kconfig"
430 source "arch/arm/mach-orion5x/Kconfig"
432 source "arch/arm/mach-pxa/Kconfig"
434 source "arch/arm/mach-qcom/Kconfig"
436 source "arch/arm/mach-realtek/Kconfig"
438 source "arch/arm/mach-rpc/Kconfig"
440 source "arch/arm/mach-rockchip/Kconfig"
442 source "arch/arm/mach-s3c/Kconfig"
444 source "arch/arm/mach-s5pv210/Kconfig"
446 source "arch/arm/mach-sa1100/Kconfig"
448 source "arch/arm/mach-shmobile/Kconfig"
450 source "arch/arm/mach-socfpga/Kconfig"
452 source "arch/arm/mach-spear/Kconfig"
454 source "arch/arm/mach-sti/Kconfig"
456 source "arch/arm/mach-stm32/Kconfig"
458 source "arch/arm/mach-sunxi/Kconfig"
460 source "arch/arm/mach-tegra/Kconfig"
462 source "arch/arm/mach-ux500/Kconfig"
464 source "arch/arm/mach-versatile/Kconfig"
466 source "arch/arm/mach-vt8500/Kconfig"
468 source "arch/arm/mach-zynq/Kconfig"
483 bool "ARM MPS2 platform"
511 source "arch/arm/mm/Kconfig"
522 source "arch/arm/Kconfig-nommu"
540 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
544 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
549 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
554 It does not affect the MPCore. This option enables the ARM Ltd.
558 bool "ARM errata: Stale prediction on replaced interworking branch"
562 r1p* erratum. If a code sequence containing an ARM/Thumb
567 executing the new code sequence in the incorrect ARM or Thumb state.
574 bool "ARM errata: Processor deadlock when a false hazard is created"
590 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
605 bool "ARM errata: DMB operation may be faulty"
621 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
639 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
650 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
662 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
678 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
693 bool "ARM errata: possible faulty MMU translations following an ASID switch"
704 bool "ARM errata: no automatic Store Buffer drain"
715 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
727 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
741 bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
752 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
762 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
772 bool "ARM errata: incorrect instructions may be executed from loop buffer"
781 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
795 bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock"
805 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
814 bool "ARM errata: A12: CPU might deadlock under some very rare internal conditions"
822 bool "ARM errata: A17: DMB ST might fail to create order between stores"
831 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
843 bool "ARM errata: A17: CPU might deadlock under some very rare internal conditions"
854 source "arch/arm/common/Kconfig"
872 bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
875 The v7 ARM states that all cache and branch predictor maintenance
948 Support ARM cpu topology definition. The MPIDR register defines
950 topology of an ARM System.
955 This option enables support for the ARM snoop control unit
962 This option enables support for the ARM architected timer
967 This options enables support for the ARM timer and watchdog unit
1070 bool "Support for the ARM Power State Coordination Interface (PSCI)"
1076 management operations described in ARM document number ARM DEN
1078 ARM processors").
1138 The ARM compiler inserts calls to __aeabi_idiv() and
1152 bool "Use the ARM EABI to compile the kernel" if !CPU_V7 && \
1157 ARM ABI (aka EABI). This is only useful if you are using a user
1171 new (ARM EABI) one. It also provides a compatibility layer to
1173 in memory differs between the legacy ABI and the new ARM EABI
1203 The address space of ARM processors is only 4 Gigabytes large
1299 ARM processors cannot fetch/store information which is not
1301 address divisible by 4. On 32-bit ARM processors, these non-aligned
1347 bool "Xen guest support on ARM"
1348 depends on ARM && AEABI && OF
1358 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1549 ROM memory will be arch/arm/boot/xipImage.
1635 to be enabled much earlier than we do on ARM, which is non-trivial.
1696 Please see <file:Documentation/arch/arm/vfp/release-notes.rst> for