Lines Matching full:arm
2 config ARM config
168 The ARM series is a line of low-power-consumption RISC chip designs
169 licensed by ARM Ltd and targeted at embedded applications and
170 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
171 manufactured, but legacy ARM-based PC hardware remains popular in
172 Europe. There is an ARM Linux project with a web page at
173 <http://www.arm.linux.org.uk/>.
347 In general, all Arm machines can be supported in a single
357 source "arch/arm/Kconfig.platforms"
364 source "arch/arm/mach-actions/Kconfig"
366 source "arch/arm/mach-alpine/Kconfig"
368 source "arch/arm/mach-artpec/Kconfig"
370 source "arch/arm/mach-aspeed/Kconfig"
372 source "arch/arm/mach-at91/Kconfig"
374 source "arch/arm/mach-axxia/Kconfig"
376 source "arch/arm/mach-bcm/Kconfig"
378 source "arch/arm/mach-berlin/Kconfig"
380 source "arch/arm/mach-clps711x/Kconfig"
382 source "arch/arm/mach-davinci/Kconfig"
384 source "arch/arm/mach-digicolor/Kconfig"
386 source "arch/arm/mach-dove/Kconfig"
388 source "arch/arm/mach-ep93xx/Kconfig"
390 source "arch/arm/mach-exynos/Kconfig"
392 source "arch/arm/mach-footbridge/Kconfig"
394 source "arch/arm/mach-gemini/Kconfig"
396 source "arch/arm/mach-highbank/Kconfig"
398 source "arch/arm/mach-hisi/Kconfig"
400 source "arch/arm/mach-imx/Kconfig"
402 source "arch/arm/mach-ixp4xx/Kconfig"
404 source "arch/arm/mach-keystone/Kconfig"
406 source "arch/arm/mach-lpc32xx/Kconfig"
408 source "arch/arm/mach-mediatek/Kconfig"
410 source "arch/arm/mach-meson/Kconfig"
412 source "arch/arm/mach-milbeaut/Kconfig"
414 source "arch/arm/mach-mmp/Kconfig"
416 source "arch/arm/mach-mstar/Kconfig"
418 source "arch/arm/mach-mv78xx0/Kconfig"
420 source "arch/arm/mach-mvebu/Kconfig"
422 source "arch/arm/mach-mxs/Kconfig"
424 source "arch/arm/mach-nomadik/Kconfig"
426 source "arch/arm/mach-npcm/Kconfig"
428 source "arch/arm/mach-omap1/Kconfig"
430 source "arch/arm/mach-omap2/Kconfig"
432 source "arch/arm/mach-orion5x/Kconfig"
434 source "arch/arm/mach-pxa/Kconfig"
436 source "arch/arm/mach-qcom/Kconfig"
438 source "arch/arm/mach-realtek/Kconfig"
440 source "arch/arm/mach-rpc/Kconfig"
442 source "arch/arm/mach-rockchip/Kconfig"
444 source "arch/arm/mach-s3c/Kconfig"
446 source "arch/arm/mach-s5pv210/Kconfig"
448 source "arch/arm/mach-sa1100/Kconfig"
450 source "arch/arm/mach-shmobile/Kconfig"
452 source "arch/arm/mach-socfpga/Kconfig"
454 source "arch/arm/mach-spear/Kconfig"
456 source "arch/arm/mach-sti/Kconfig"
458 source "arch/arm/mach-stm32/Kconfig"
460 source "arch/arm/mach-sunxi/Kconfig"
462 source "arch/arm/mach-tegra/Kconfig"
464 source "arch/arm/mach-ux500/Kconfig"
466 source "arch/arm/mach-versatile/Kconfig"
468 source "arch/arm/mach-vt8500/Kconfig"
470 source "arch/arm/mach-zte/Kconfig"
472 source "arch/arm/mach-zynq/Kconfig"
489 bool "ARM MPS2 platform (DEPRECATED)"
519 source "arch/arm/mm/Kconfig"
538 source "arch/arm/Kconfig-nommu"
556 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
560 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
565 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
570 It does not affect the MPCore. This option enables the ARM Ltd.
574 bool "ARM errata: Stale prediction on replaced interworking branch"
578 r1p* erratum. If a code sequence containing an ARM/Thumb
583 executing the new code sequence in the incorrect ARM or Thumb state.
590 bool "ARM errata: Processor deadlock when a false hazard is created"
606 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
621 bool "ARM errata: DMB operation may be faulty"
637 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
655 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
666 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
678 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
694 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
709 bool "ARM errata: possible faulty MMU translations following an ASID switch"
720 bool "ARM errata: no automatic Store Buffer drain"
731 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
743 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
757 bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
768 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
778 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
788 bool "ARM errata: incorrect instructions may be executed from loop buffer"
797 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
811 bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock"
821 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
830 bool "ARM errata: A12: CPU might deadlock under some very rare internal conditions"
838 bool "ARM errata: A17: DMB ST might fail to create order between stores"
847 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
859 bool "ARM errata: A17: CPU might deadlock under some very rare internal conditions"
870 source "arch/arm/common/Kconfig"
888 bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
891 The v7 ARM states that all cache and branch predictor maintenance
964 Support ARM cpu topology definition. The MPIDR register defines
966 topology of an ARM System.
971 This option enables support for the ARM snoop control unit
978 This option enables support for the ARM architected timer
983 This options enables support for the ARM timer and watchdog unit
1086 bool "Support for the ARM Power State Coordination Interface (PSCI)"
1092 management operations described in ARM document number ARM DEN
1094 ARM processors").
1154 The ARM compiler inserts calls to __aeabi_idiv() and
1168 bool "Use the ARM EABI to compile the kernel" if CPU_SA110 || CPU_SA1100
1171 The Arm EABI is the default ABI on all modern Linux
1187 new (ARM EABI) one. It also provides a compatibility layer to
1189 in memory differs between the legacy ABI and the new ARM EABI
1216 The address space of ARM processors is only 4 Gigabytes large
1312 ARM processors cannot fetch/store information which is not
1314 address divisible by 4. On 32-bit ARM processors, these non-aligned
1360 bool "Xen guest support on ARM"
1361 depends on ARM && AEABI && OF
1371 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1565 ROM memory will be arch/arm/boot/xipImage.
1651 to be enabled much earlier than we do on ARM, which is non-trivial.
1712 Please see <file:Documentation/arch/arm/vfp/release-notes.rst> for