Lines Matching +full:exynos7 +full:- +full:ufs
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC series UFS host controller
10 - Alim Akhtar <alim.akhtar@samsung.com>
13 Each Samsung UFS host controller instance should have its own node.
18 - google,gs101-ufs
19 - samsung,exynos7-ufs
20 - samsung,exynosautov9-ufs
21 - samsung,exynosautov9-ufs-vh
22 - tesla,fsd-ufs
26 - description: HCI register
27 - description: vendor specific register
28 - description: unipro register
29 - description: UFS protector register
31 reg-names:
33 - const: hci
34 - const: vs_hci
35 - const: unipro
36 - const: ufsp
41 - description: ufs link core clock
42 - description: unipro main clock
43 - description: fmp clock
44 - description: ufs aclk clock
45 - description: ufs pclk clock
46 - description: sysreg clock
48 clock-names:
51 - const: core_clk
52 - const: sclk_unipro_main
53 - const: fmp
54 - const: aclk
55 - const: pclk
56 - const: sysreg
61 phy-names:
62 const: ufs-phy
65 $ref: /schemas/types.yaml#/definitions/phandle-array
67 - items:
68 - description: phandle to FSYSx sysreg node
69 - description: offset of the control register for UFS io coherency setting
71 Phandle and offset to the FSYSx sysreg for UFS io coherency setting.
73 dma-coherent: true
76 - compatible
77 - reg
78 - phys
79 - phy-names
80 - clocks
81 - clock-names
84 - $ref: ufs-common.yaml
85 - if:
89 const: google,gs101-ufs
96 clock-names:
104 clock-names:
110 - |
111 #include <dt-bindings/interrupt-controller/arm-gic.h>
112 #include <dt-bindings/clock/exynos7-clk.h>
114 ufs: ufs@15570000 {
115 compatible = "samsung,exynos7-ufs";
120 reg-names = "hci", "vs_hci", "unipro", "ufsp";
124 clock-names = "core_clk", "sclk_unipro_main";
125 pinctrl-names = "default";
126 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
128 phy-names = "ufs-phy";