Lines Matching +full:nand +full:- +full:cache
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QPIC NAND controller
10 - Md sadre Alam <quic_mdalam@quicinc.com>
13 The QCOM QPIC-SPI-NAND flash controller is an extended version of
14 the QCOM QPIC NAND flash controller. It can work both in serial
15 and parallel mode. It supports typical SPI-NAND page cache
20 - $ref: /schemas/spi/spi-controller.yaml#
25 - items:
26 - enum:
27 - qcom,ipq5018-snand
28 - const: qcom,ipq9574-snand
29 - const: qcom,ipq9574-snand
37 clock-names:
39 - const: core
40 - const: aon
41 - const: iom
45 - description: tx DMA channel
46 - description: rx DMA channel
47 - description: cmd DMA channel
49 dma-names:
51 - const: tx
52 - const: rx
53 - const: cmd
56 - compatible
57 - reg
58 - clocks
59 - clock-names
64 - |
65 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
67 compatible = "qcom,ipq9574-snand";
73 clock-names = "core", "aon", "iom";
75 #address-cells = <1>;
76 #size-cells = <0>;
79 compatible = "spi-nand";
81 #address-cells = <1>;
82 #size-cells = <1>;
83 nand-ecc-engine = <&qpic_nand>;
84 nand-ecc-strength = <4>;
85 nand-ecc-step-size = <512>;