Lines Matching +full:protocol +full:- +full:node
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
15 USI shares almost all internal circuits within each protocol, so only one
16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
26 - items:
27 - enum:
28 - google,gs101-usi
29 - samsung,exynosautov9-usi
30 - samsung,exynosautov920-usi
31 - const: samsung,exynos850-usi
32 - enum:
33 - samsung,exynos850-usi
41 clock-names:
43 - const: pclk
44 - const: ipclk
48 "#address-cells":
51 "#size-cells":
55 $ref: /schemas/types.yaml#/definitions/phandle-array
57 - items:
58 - description: phandle to System Register syscon node
59 - description: offset of SW_CONF register for this USI controller
61 Should be phandle/offset pair. The phandle to System Register syscon node
68 Selects USI function (which serial protocol to use). Refer to
69 <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
71 samsung,clkreq-on:
74 Enable this property if underlying protocol requires the clock to be
77 multi-master mode. Usually this property is needed if USI mode is set
83 "^i2c@[0-9a-f]+$":
84 $ref: /schemas/i2c/i2c-exynos5.yaml
85 description: Child node describing underlying I2C
87 "^serial@[0-9a-f]+$":
89 description: Child node describing underlying UART/serial
91 "^spi@[0-9a-f]+$":
93 description: Child node describing underlying SPI
96 - compatible
97 - ranges
98 - "#address-cells"
99 - "#size-cells"
100 - samsung,sysreg
101 - samsung,mode
108 - samsung,exynos850-usi
117 - description: Bus (APB) clock
118 - description: Operating clock for UART/SPI/I2C protocol
120 clock-names:
124 - reg
125 - clocks
126 - clock-names
132 clock-names: false
133 samsung,clkreq-on: false
138 - |
139 #include <dt-bindings/interrupt-controller/arm-gic.h>
140 #include <dt-bindings/soc/samsung,exynos-usi.h>
143 compatible = "samsung,exynos850-usi";
147 samsung,clkreq-on; /* needed for UART mode */
148 #address-cells = <1>;
149 #size-cells = <1>;
152 clock-names = "pclk", "ipclk";
155 compatible = "samsung,exynos850-uart";
159 clock-names = "uart", "clk_uart_baud0";
164 compatible = "samsung,exynos850-hsi2c", "samsung,exynosautov9-hsi2c";
167 #address-cells = <1>;
168 #size-cells = <0>;
170 clock-names = "hsi2c", "hsi2c_pclk";