Lines Matching +full:core +full:- +full:domain
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
22 - xlnx,zynqmp-r5fss
23 - xlnx,versal-r5fss
24 - xlnx,versal-net-r52fss
26 "#address-cells":
29 "#size-cells":
37 xlnx,cluster-mode:
42 The RPU MPCore can operate in split mode (Dual-processor performance), Safety
43 lock-step mode(Both RPU cores execute the same code in lock-step,
44 clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
45 core 1 runs normally). The processor does not support dynamic configuration.
54 xlnx,tcm-mode:
63 "^r(.*)@[0-9a-f]+$":
67 The RPU is located in the Low Power Domain of the Processor Subsystem.
70 memory space is non-cacheable.
74 per processor. In lock-step mode, the processor has access to 256KB of
80 - xlnx,zynqmp-r5f
81 - xlnx,versal-r5f
82 - xlnx,versal-net-r52f
88 reg-names:
92 power-domains:
99 - description: mailbox channel to send data to RPU
100 - description: mailbox channel to receive data from RPU
102 mbox-names:
105 - const: tx
106 - const: rx
109 $ref: /schemas/types.yaml#/definitions/phandle-array
115 phandles to one or more reserved on-chip SRAM regions. Other than TCM,
123 memory-region:
132 - description: region used for RPU firmware image section
133 - description: vdev buffer
134 - description: vring0
135 - description: vring1
139 - compatible
140 - reg
141 - reg-names
142 - power-domains
145 - compatible
146 - "#address-cells"
147 - "#size-cells"
148 - ranges
151 - if:
156 - xlnx,versal-net-r52fss
159 xlnx,tcm-mode: false
162 "^r52f@[0-9a-f]+$":
169 - description: ATCM internal memory
170 - description: BTCM internal memory
171 - description: CTCM internal memory
173 reg-names:
176 - const: atcm0
177 - const: btcm0
178 - const: ctcm0
180 power-domains:
183 - description: RPU core power domain
184 - description: ATCM power domain
185 - description: BTCM power domain
186 - description: CTCM power domain
188 - if:
193 - xlnx,zynqmp-r5fss
194 - xlnx,versal-r5fss
198 xlnx,cluster-mode:
202 xlnx,tcm-mode:
206 "^r5f@[0-9a-f]+$":
213 - description: ATCM internal memory
214 - description: BTCM internal memory
215 - description: extra ATCM memory in lockstep mode
216 - description: extra BTCM memory in lockstep mode
218 reg-names:
221 - const: atcm0
222 - const: btcm0
223 - const: atcm1
224 - const: btcm1
226 power-domains:
229 - description: RPU core power domain
230 - description: ATCM power domain
231 - description: BTCM power domain
232 - description: second ATCM power domain
233 - description: second BTCM power domain
236 - xlnx,tcm-mode
240 xlnx,tcm-mode:
244 "^r5f@[0-9a-f]+$":
251 - description: ATCM internal memory
252 - description: BTCM internal memory
254 reg-names:
257 - const: atcm0
258 - const: btcm0
260 power-domains:
263 - description: RPU core power domain
264 - description: ATCM power domain
265 - description: BTCM power domain
268 - xlnx,tcm-mode
273 - |
274 #include <dt-bindings/power/xlnx-zynqmp-power.h>
278 #address-cells = <2>;
279 #size-cells = <2>;
282 compatible = "xlnx,zynqmp-r5fss";
283 xlnx,cluster-mode = <0>;
284 xlnx,tcm-mode = <0>;
286 #address-cells = <2>;
287 #size-cells = <2>;
294 compatible = "xlnx,zynqmp-r5f";
296 reg-names = "atcm0", "btcm0";
297 power-domains = <&zynqmp_firmware PD_RPU_0>,
300 memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
303 mbox-names = "tx", "rx";
307 compatible = "xlnx,zynqmp-r5f";
309 reg-names = "atcm0", "btcm0";
310 power-domains = <&zynqmp_firmware PD_RPU_1>,
313 memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
316 mbox-names = "tx", "rx";
321 - |
324 #address-cells = <2>;
325 #size-cells = <2>;
328 compatible = "xlnx,zynqmp-r5fss";
329 xlnx,cluster-mode = <1>;
330 xlnx,tcm-mode = <1>;
332 #address-cells = <2>;
333 #size-cells = <2>;
340 compatible = "xlnx,zynqmp-r5f";
345 reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
346 power-domains = <&zynqmp_firmware PD_RPU_0>,
351 memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
354 mbox-names = "tx", "rx";
358 compatible = "xlnx,zynqmp-r5f";
360 reg-names = "atcm0", "btcm0";
361 power-domains = <&zynqmp_firmware PD_RPU_1>,
364 memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
367 mbox-names = "tx", "rx";