Lines Matching +full:sub +full:- +full:processor
4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
10 controller, a dedicated local power/sleep controller etc. The DSP processor
15 Each DSP Core sub-system is represented as a single DT node.
18 --------------------
21 - compatible: Should be one of the following,
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
24 - reg: Should contain an entry for each value in 'reg-names'.
27 the parent node's '#address-cells' and '#size-cells' values.
29 - reg-names: Should contain strings with the following names, each
34 - interrupts: Should contain the interrupt number used to receive the
36 interrupt-specifier format as dictated by the
37 'interrupt-parent' node.
39 - memory-region: phandle to the reserved memory node to be associated
43 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
47 --------
50 reserved-memory {
51 #address-cells = <1>;
52 #size-cells = <1>;
55 dsp_memory_region: dsp-memory@c3000000 {
56 compatible = "shared-dma-pool";
65 compatible = "ti,da850-dsp";
71 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg",
73 interrupt-parent = <&intc>;
75 memory-region = <&dsp_memory_region>;