Lines Matching +full:usb +full:- +full:phy

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Marvell Armada CP110/CP115 UTMI PHY
11   - Konstantin Porotchkin <kostap@marvell.com>
14   On Armada 7k/8k and CN913x, there are two host and one device USB controllers.
15   Each of two exiting UTMI PHYs could be connected to either USB host or USB device
17   The USB device controller can only be connected to a single UTMI PHY port
18                       0.H----- USB HOST0
19   UTMI PHY0  --------/
20                       0.D-----0
21                                \------ USB DEVICE
22                       1.D-----1
23   UTMI PHY1  --------\
24                       1.H----- USB HOST1
28     const: marvell,cp110-utmi-phy
33   "#address-cells":
36   "#size-cells":
39   marvell,system-controller:
44   swap-dx-lanes:
45     $ref: /schemas/types.yaml#/definitions/uint32-array
47       Specifies the ports which will swap the differential-pair (D+/D-),
48       default is not-swapped.
53   "^usb-phy@[0|1]$":
56       Each UTMI PHY port must be represented as a sub-node.
60         description: phy port index.
63       "#phy-cells":
67       - reg
68       - "#phy-cells"
73   - compatible
74   - reg
75   - "#address-cells"
76   - "#size-cells"
77   - marvell,system-controller
82   - |
84       compatible = "marvell,cp110-utmi-phy";
86       marvell,system-controller = <&cp0_syscon0>;
87       #address-cells = <1>;
88       #size-cells = <0>;
90       cp0_utmi0: usb-phy@0 {
92         #phy-cells = <0>;
95       cp0_utmi1: usb-phy@1 {
97         #phy-cells = <0>;
102       usb-phy = <&cp0_usb3_0_phy0>;
104       phy-names = "utmi";
105       /* UTMI0 is connected to USB host controller (default mode) */
110       usb-phy = <&cp0_usb3_0_phy1>;
112       phy-names = "utmi";
113       /* UTMI1 is connected to USB device controller */