Lines Matching +full:meson +full:- +full:gx +full:- +full:vpu
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 - $ref: /schemas/sound/dai-common.yaml#
17 The Amlogic Meson Synopsys Designware Integration is composed of
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
36 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
43 Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare
50 - items:
51 - enum:
52 - amlogic,meson-gxbb-dw-hdmi # GXBB (S905)
53 - amlogic,meson-gxl-dw-hdmi # GXL (S905X, S905D)
54 - amlogic,meson-gxm-dw-hdmi # GXM (S912)
55 - const: amlogic,meson-gx-dw-hdmi
56 - enum:
57 - amlogic,meson-g12a-dw-hdmi # G12A (S905X2, S905Y2, S905D2)
68 clock-names:
70 - const: isfr
71 - const: iahb
72 - const: venci
74 power-domains:
81 reset-names:
83 - const: hdmitx_apb
84 - const: hdmitx
85 - const: hdmitx_phy
87 hdmi-supply:
100 "#address-cells":
103 "#size-cells":
106 "#sound-dai-cells":
109 sound-name-prefix: true
112 - compatible
113 - reg
114 - interrupts
115 - clocks
116 - clock-names
117 - resets
118 - reset-names
119 - port@0
120 - port@1
121 - "#address-cells"
122 - "#size-cells"
127 - |
128 hdmi_tx: hdmi-tx@c883a000 {
129 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
133 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
135 clock-names = "isfr", "iahb", "venci";
136 power-domains = <&pd_vpu>;
137 #address-cells = <1>;
138 #size-cells = <0>;
140 /* VPU VENC Input */
145 remote-endpoint = <&hdmi_tx_out>;
154 remote-endpoint = <&hdmi_connector_in>;