| 6dfe26cb | 30-Mar-2025 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: v1.23 release
This version includes the following changes:
- Displays SST-PP2 revision fields.
- Skips updating uncore frequency limits on newer generations of CP
tools/power/x86/intel-speed-select: v1.23 release
This version includes the following changes:
- Displays SST-PP2 revision fields.
- Skips updating uncore frequency limits on newer generations of CPUs.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| 51272ca7 | 17-Apr-2025 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Skip uncore frequency update
On SST PP level switch, skip adjusting the uncore frequency limit and
allow the hardware to handle this on newer platforms.
As newer
tools/power/x86/intel-speed-select: Skip uncore frequency update
On SST PP level switch, skip adjusting the uncore frequency limit and
allow the hardware to handle this on newer platforms.
As newer generations of CPUs have changed the extended family identifier,
use this identifier to exclude the update.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| 7dd55636 | 06-Mar-2025 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: v1.22 release
This version has fix for:
- Display of die ID and optimize array size for multi package
systems.
- Fix build warning with cross compiler
Signed-off
tools/power/x86/intel-speed-select: v1.22 release
This version has fix for:
- Display of die ID and optimize array size for multi package
systems.
- Fix build warning with cross compiler
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| 8d9cfb6d | 29-Jan-2025 |
Khem Raj <raj.khem@gmail.com> |
tools/power/x86/intel-speed-select: Prefix header search path with sysroot
This helps when using a cross-compiler for building intel-speed-select,
currently, its hardcoded to pick libnl3 headers fro
tools/power/x86/intel-speed-select: Prefix header search path with sysroot
This helps when using a cross-compiler for building intel-speed-select,
currently, its hardcoded to pick libnl3 headers from build host which may
not be same as build target when cross compiling.
cc -print-sysroot will print nothing if compiler is configured without
a sysroot and result in same string as it is now.
Fixes errors with gcc configured with host include poisoning e.g.
cc1: error: include location "/usr/include/libnl3" is unsafe for
cross-compilation [-Werror=poison-system-directories]
Signed-off-by: Khem Raj <raj.khem@gmail.com>
[ srinivas: Changelog edits for checkpatch warning ]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| c49e805d | 05-Mar-2025 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix the condition to check multi die system
Even when there is no die exported by CPUID leaf 0x1F, the kernel version
after 6.9 will show non zero die_id in the s
tools/power/x86/intel-speed-select: Fix the condition to check multi die system
Even when there is no die exported by CPUID leaf 0x1F, the kernel version
after 6.9 will show non zero die_id in the sysfs. In that case maximum
die_id can still match maximum power domain ID. So the condition to check
if the power domain ID is same a die_id to prevent duplicate display
doesn't hold true.
The better condition is to check if the maximum die_id is more than the
maximum package_id. If the die_id is exposed by CPUID leaf 0x1F, the
maximum die_id will be more than maximum package_id.
With this change tracking of max_punit_id is not used, so remove storing
max_punit_id.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| d8d4f57e | 07-Jul-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: v1.20 release
This version addresses one issue:
- Fix updating TRL MSR after SST-TF is disabled in auto mode.
Signed-off-by: Srinivas Pandruvada <srinivas.pandru
tools/power/x86/intel-speed-select: v1.20 release
This version addresses one issue:
- Fix updating TRL MSR after SST-TF is disabled in auto mode.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| 5cfac5ab | 26-Apr-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: v1.19 release
This version addresses issues with:
- Support of SST BF/TF support per level
- Increase number of CPUs displayed
- Present all TRL levels for turbo-
tools/power/x86/intel-speed-select: v1.19 release
This version addresses issues with:
- Support of SST BF/TF support per level
- Increase number of CPUs displayed
- Present all TRL levels for turbo-freq
- Fix display for unsupported levels
- Support multiple dies
- Increase die count
- Change CPU display for non compute domain
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| 8ebc39ac | 26-Apr-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Display CPU as None for -1
When there is no CPU in a power domain, display "None" instead of -1.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.in
tools/power/x86/intel-speed-select: Display CPU as None for -1
When there is no CPU in a power domain, display "None" instead of -1.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| 1fcf670e | 26-Mar-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: SST BF/TF support per level
SST BF and TF can be enabled/disabled per level. So check the current
level support from the mask of supported levels.
This change fr
tools/power/x86/intel-speed-select: SST BF/TF support per level
SST BF and TF can be enabled/disabled per level. So check the current
level support from the mask of supported levels.
This change from a single level to mask for info.sst_tf_support and
info.sst_tf_support is indicated by API version change. Use as mask for
API version above 2. In this way there is no change in behavior when
running on older kernel with API version 2.
Since the tool can support now API version 3, update the supported API
version.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| 80a513e3 | 25-Mar-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Increase number of CPUs displayed
Currently max 128 CPUs can be displayed in the enable CPU list. Double
the range. Since the size is big for stack allocation, ch
tools/power/x86/intel-speed-select: Increase number of CPUs displayed
Currently max 128 CPUs can be displayed in the enable CPU list. Double
the range. Since the size is big for stack allocation, change to static.
Here changing to static is fine as these functions are called in serial.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| 38fa152b | 09-Mar-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Present all TRL levels for turbo-freq
For turbo-freq feature, only 3 levels of frequencies are displayed even
if platform support more. Present all levels based o
tools/power/x86/intel-speed-select: Present all TRL levels for turbo-freq
For turbo-freq feature, only 3 levels of frequencies are displayed even
if platform support more. Present all levels based on the CPU model.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| 55d5639b | 09-Mar-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix display for unsupported levels
During call to "intel-speed-select turbo-freq info" some junk values are
reported for unsupported levels. Initialize the struct
tools/power/x86/intel-speed-select: Fix display for unsupported levels
During call to "intel-speed-select turbo-freq info" some junk values are
reported for unsupported levels. Initialize the structure fact_info with
0s, so that isst_fact_display_information() will skip "0" values in the
frequency.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| f9264471 | 08-Mar-2024 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Support multiple dies
When the die id is same as punit compute die ID, treat them same. In this
case, when for_each_online_power_domain_in_set() is called, then d
tools/power/x86/intel-speed-select: Support multiple dies
When the die id is same as punit compute die ID, treat them same. In this
case, when for_each_online_power_domain_in_set() is called, then don't
loop for each punit in a die. Just loop for all punits in a package.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| a590ed62 | 13-Oct-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: v1.18 release
This version addresses issues with:
- When CPU 0 hotplug is not possible, try cgroup v2 isolation
without any user input
- Fix turbo mode enable/dis
tools/power/x86/intel-speed-select: v1.18 release
This version addresses issues with:
- When CPU 0 hotplug is not possible, try cgroup v2 isolation
without any user input
- Fix turbo mode enable/disable swapped
- Sanitize command line integer and hex arguments
- Add more error messages
- Increase CPU count in one request
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| 3bc0f20a | 03-Oct-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Use cgroup isolate for CPU 0
From kernel version 6.5, CPU 0 hotplug capability is deprecated.
If some SST profile doesn't have CPU 0, then it is no longer possibl
tools/power/x86/intel-speed-select: Use cgroup isolate for CPU 0
From kernel version 6.5, CPU 0 hotplug capability is deprecated.
If some SST profile doesn't have CPU 0, then it is no longer possible to
offline CPU 0. This means that user space threads will still run on
CPU 0.
To workaround this issue, use cgroup v2 isolation feature. Whenever there
/sys/devices/system/cpu/cpu0/online file is absent or open fails, isolate
CPU 0 via CPU cgroup v2 isolation. Also add a command line option to
force even if the /sys/devices/system/cpu/cpu0/online is present.
The previous commit "01bcb56f059e ("tools/power/x86/intel-speed-select:
Prevent CPU 0 offline") was just warning about this issue based on the
kernel version 6.5 and above. With this new approach, instead of warning
take action to mitigate the issue.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| bc5370cc | 13-Oct-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Increase max CPUs in one request
With the increase in the CPU count, this count needs to be updated.
Increase max CPU count to 512.
Signed-off-by: Srinivas Pandr
tools/power/x86/intel-speed-select: Increase max CPUs in one request
With the increase in the CPU count, this count needs to be updated.
Increase max CPU count to 512.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| da4c1b9e | 08-Sep-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Display error for core-power support
When core-power is getting enabled, if the feaure is not supported,
display error.
Signed-off-by: Srinivas Pandruvada <srini
tools/power/x86/intel-speed-select: Display error for core-power support
When core-power is getting enabled, if the feaure is not supported,
display error.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|
| 2fe8d2d7 | 08-Sep-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: No TRL for non compute domains
Don't call to set or get TRL for domains in which there are no CPUs.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux
tools/power/x86/intel-speed-select: No TRL for non compute domains
Don't call to set or get TRL for domains in which there are no CPUs.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
show more ...
|