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Revision tags: v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3 |
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| #
c95baf12 |
| 20-Feb-2020 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
Merge drm-intel-next-queued into gvt-next
Backmerge to pull in
https://patchwork.freedesktop.org/patch/353621/?series=73544&rev=1
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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Revision tags: v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5 |
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| #
28336be5 |
| 30-Dec-2019 |
Ingo Molnar <mingo@kernel.org> |
Merge tag 'v5.5-rc4' into locking/kcsan, to resolve conflicts
Conflicts:
init/main.c
lib/Kconfig.debug
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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| #
b19efcab |
| 01-Feb-2020 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 5.6 merge window.
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| #
1bdd3e05 |
| 10-Jan-2020 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v5.5-rc5' into next
Sync up with mainline to get SPI "delay" API changes.
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| #
22164fbe |
| 06-Jan-2020 |
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> |
Merge drm/drm-next into drm-misc-next
Requested, and we need v5.5-rc1 backported as our current branch is still based on v5.4.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Revision tags: v5.5-rc4, v5.5-rc3, v5.5-rc2 |
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| #
023265ed |
| 11-Dec-2019 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next-queued
Sync up with v5.5-rc1 to get the updated lock_release() API among other
things. Fix the conflict reported by Stephen Rothwell [1].
[1] http://lore.kern
Merge drm/drm-next into drm-intel-next-queued
Sync up with v5.5-rc1 to get the updated lock_release() API among other
things. Fix the conflict reported by Stephen Rothwell [1].
[1] http://lore.kernel.org/r/20191210093957.5120f717@canb.auug.org.au
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
show more ...
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| #
2040cf9f |
| 10-Dec-2019 |
Ingo Molnar <mingo@kernel.org> |
Merge tag 'v5.5-rc1' into core/kprobes, to resolve conflicts
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Revision tags: v5.5-rc1 |
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| #
4f797f56 |
| 08-Dec-2019 |
Ingo Molnar <mingo@kernel.org> |
Merge branch 'linus' into sched/urgent, to pick up the latest before merging new patches
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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| #
942e6f8a |
| 05-Dec-2019 |
Olof Johansson <olof@lixom.net> |
Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.
Signed-off-by: Olof Johans
Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.
Signed-off-by: Olof Johansson <olof@lixom.net>
show more ...
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| #
ddebe839 |
| 02-Dec-2019 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This merge window we have one small clk provider API in the core
framewor
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This merge window we have one small clk provider API in the core
framework and then a bunch of driver updates and a handful of new
drivers. In terms of diffstat the Qualcomm and Amlogic drivers are
high up there because of all the clk data introcued by new drivers.
The Nvidia Tegra driver had a lot of work done this cycle too to
support suspend/resume and memory controllers. And the OMAP clk driver
got proper clk and reset handling in place.
Rounding out the patches are various updates to remove unused data,
mark things static, correct incorrect data in drivers, etc. All the
little things that improve drivers and maintain code health. I will
point out that there's a patch in here for the GPIO clk driver, that
almost nobody uses, which changes behavior and causes clk_set_rate()
to try to change the GPIO gate clk's parent. Other than that things
are fairly well SoC specific here.
Core:
- Add a clk provider API to get current parent index
- Plug a memory leak in clk_unregister() path
New Drivers:
- CGU in Ingenix X1000
- Bitmain BM1880 clks
- Qualcomm MSM8998 GPU clk controllers
- Qualcomm SC7180 GCC and RPMH clk controllers
- Qualcomm QCS404 Q6SSTOP clk controllers
- Add support for the Renesas R-Car M3-W+ (r8a77961) SoC
- Add support for the Renesas RZ/G2N (r8a774b1) SoC
- Add Tegra20/30 External Memory Clock (EMC) support
Updates:
- Make gpio gate clks propagate rate setting up to parent
- Prepare Armada 3700 for suspend to RAM by moving PCIe
suspend/resume priority
- Drop unused variables, enums, etc. in various clk drivers
- Convert various drivers to use devm_platform_ioremap_resource()
- Use struct_size() some more in various clk drivers
- Improve Rockchip px30 clk tree
- Add suspend/resume support to Tegra210 clk driver
- Reimplement SOR clks on earlier Tegra SoCs, helping HDMI and DP
- Allwinner DT exports and H6 clk tree fixes
- Proper clk and reset handling for OMAP SoCs
- Revamped TI divider clk to clamp max divider
- Make 1443X/1416X PLL clock structure common for reusing among i.MX8
SoCs
- Drop IMX7ULP_CLK_MIPI_PLL clock, it shouldn't be used
- Add VIDEO2_PLL clock for imx8mq
- Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs
- Add sm1 support in the Amlogic audio clock controller
- Switch some clocks on R-Car Gen2/3 to .determine_rate()
- Remove Renesas R-Car Gen2 legacy DT clock support
- Improve arithmetic divisions on Renesas R-Car Gen2 and Gen3
- Improve Renesas R-Car Gen3 SD clock handling
- Add rate table for Samsung exynos542x GPU and VPLL clks
- Fix potential CPU performance degradation after system
suspend/resume cycle on exynos542x SoCs"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (160 commits)
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
MAINTAINERS: Add entry for BM1880 SoC clock driver
clk: Add common clock driver for BM1880 SoC
dt-bindings: clock: Add devicetree binding for BM1880 SoC
clk: Add clk_hw_unregister_composite helper function definition
clk: Zero init clk_init_data in helpers
clk: ingenic: Allow drivers to be built with COMPILE_TEST
MAINTAINERS: Update section for Ux500 clock drivers
clk: mark clk_disable_unused() as __init
clk: Fix memory leak in clk_unregister()
clk: Ingenic: Add CGU driver for X1000.
dt-bindings: clock: Add X1000 bindings.
clk: tegra: Use match_string() helper to simplify the code
clk: pxa: fix one of the pxa RTC clocks
clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()
clk: armada-xp: remove unused code
clk: tegra: Fix build error without CONFIG_PM_SLEEP
clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP
clk: tegra: Optimize PLLX restore on Tegra20/30
clk: tegra: Add suspend and resume support on Tegra210
...
show more ...
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| #
74ca9288 |
| 27-Nov-2019 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next
* clk-hisi:
clk: hi6220: use CLK_OF_DECLARE_DRIVER
* clk-amlogic:
clk: meson: axg-audio: use d
Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next
* clk-hisi:
clk: hi6220: use CLK_OF_DECLARE_DRIVER
* clk-amlogic:
clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code
clk: meson: axg_audio: add sm1 support
clk: meson: axg-audio: provide clk top signal name
clk: meson: axg-audio: prepare sm1 addition
clk: meson: axg-audio: fix regmap last register
clk: meson: axg-audio: remove useless defines
dt-bindings: clock: meson: add sm1 resets to the axg-audio controller
dt-bindings: clk: axg-audio: add sm1 bindings
clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes
clk: meson: g12a: fix cpu clock rate setting
clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate
* clk-samsung:
clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D path
clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume
clk: samsung: exynos5420: Add VPLL rate table
clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume
clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU
clk: samsung: exynos5433: Fix error paths
* clk-renesas: (23 commits)
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960
dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support
clk: renesas: r8a77965: Remove superfluous semicolon
dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example
dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
dt-bindings: power: Add r8a77961 SYSC power domain definitions
clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate()
clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate()
clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()
clk: renesas: r8a774b1: Add TMU clock
clk: renesas: cpg-mssr: Add r8a774b1 support
dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding
clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()
clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div()
clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate()
clk: renesas: rcar-gen3: Improve arithmetic divisions
clk: renesas: rcar-gen2: Improve arithmetic divisions
clk: renesas: Remove R-Car Gen2 legacy DT clock support
...
* clk-imx:
clk: imx: imx8mq: fix sys3_pll_out_sels
clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock
clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code
clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code
clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code
clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code
clk: imx7ulp: Correct DDR clock mux options
clk: imx7ulp: Correct system clock source option #7
clk: imx: imx8mq: mark sys1/2_pll as fixed clock
clk: imx: imx8mn: mark sys_pll1/2 as fixed clock
clk: imx: imx8mm: mark sys_pll1/2 as fixed clock
clk: imx8mn: Define gates for pll1/2 fixed dividers
clk: imx8mm: Define gates for pll1/2 fixed dividers
clk: imx8mq: Define gates for pll1/2 fixed dividers
clk: imx: clk-pll14xx: Make two variables static
clk: imx8mq: Add VIDEO2_PLL clock
clk: imx8mn: Use common 1443X/1416X PLL clock structure
clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
clk: imx: pll14xx: Fix quick switch of S/K parameter
show more ...
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Revision tags: v5.4, v5.4-rc8, v5.4-rc7 |
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| #
b7c1b40a |
| 06-Nov-2019 |
Stephen Boyd <sboyd@kernel.org> |
Merge tag 'clk-renesas-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Switch some
Merge tag 'clk-renesas-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Switch some clocks on R-Car Gen2/3 to .determine_rate()
- Add support for the new R-Car M3-W+ (r8a77961) SoC
- Add support for the new RZ/G2N (r8a774b1) SoC
- Remove R-Car Gen2 legacy DT clock support
- Improve arithmetic divisions on R-Car Gen2 and Gen3
- Improve R-Car Gen3 SD clock handling
* tag 'clk-renesas-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (23 commits)
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960
dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support
clk: renesas: r8a77965: Remove superfluous semicolon
dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example
dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
dt-bindings: power: Add r8a77961 SYSC power domain definitions
clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate()
clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate()
clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()
clk: renesas: r8a774b1: Add TMU clock
clk: renesas: cpg-mssr: Add r8a774b1 support
dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding
clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()
clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div()
clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate()
clk: renesas: rcar-gen3: Improve arithmetic divisions
clk: renesas: rcar-gen2: Improve arithmetic divisions
clk: renesas: Remove R-Car Gen2 legacy DT clock support
...
show more ...
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Revision tags: v5.4-rc6, v5.4-rc5 |
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| #
4cc45d38 |
| 21-Oct-2019 |
Olof Johansson <olof@lixom.net> |
Merge tag 'renesas-drivers-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.5
- Add support for the new RZ/G2N (r
Merge tag 'renesas-drivers-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.5
- Add support for the new RZ/G2N (r8a774b1) SoC,
- Fix System Controller power request conflicts on recent R-Car Gen3
and RZ/G2N SoC variants and revisions,
- Minor cleanups.
* tag 'renesas-drivers-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: rcar-sysc: Add r8a774b1 support
soc: renesas: rcar-sysc: Remove unneeded inclusion of <linux/bug.h>
soc: renesas: r8a774c0-sysc: Fix power request conflicts
soc: renesas: rcar-rst: Add support for RZ/G2N
soc: renesas: Identify RZ/G2N
soc: renesas: Add Renesas R8A774B1 config option
soc: renesas: r8a77990-sysc: Fix power request conflicts
soc: renesas: r8a77980-sysc: Fix power request conflicts
soc: renesas: r8a77970-sysc: Fix power request conflicts
soc: renesas: r8a77965-sysc: Fix power request conflicts
soc: renesas: r8a7796-sysc: Fix power request conflicts
soc: renesas: r8a7795-sysc: Fix power request conflicts
soc: renesas: rcar-sysc: Prepare for fixing power request conflicts
dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions
dt-bindings: power: Add r8a774b1 SYSC power domain definitions
Link: https://lore.kernel.org/r/20191018101136.26350-5-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
show more ...
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| #
662be400 |
| 21-Oct-2019 |
Olof Johansson <olof@lixom.net> |
Merge tag 'renesas-arm64-dt-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.5
- Support for the RZ/G2N (r8a774b1) S
Merge tag 'renesas-arm64-dt-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.5
- Support for the RZ/G2N (r8a774b1) SoC and the HiHope RZ/G2N board,
- CPU idle support for R-Car H3 and M3-W,
- LVDS and backlight support on the HiHope RZ/G2M and RZ/G2N boards,
with Advantech idk-1110wr LVDS panel,
- Minor fixes and improvements.
* tag 'renesas-arm64-dt-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (50 commits)
arm64: dts: renesas: r8a774b1: Add CAN and CAN FD support
arm64: dts: renesas: Add iommus to R-Car Gen3 SDHI/MMC nodes
arm64: dts: renesas: r8a774b1: Add INTC-EX device node
arm64: dts: renesas: r8a774b1: Add USB3.0 device nodes
arm64: dts: renesas: r8a774b1: Add USB-DMAC and HSUSB device nodes
arm64: dts: renesas: r8a774b1: Add USB2.0 phy and host (EHCI/OHCI) device nodes
arm64: dts: renesas: r8a774b1: Add Sound and Audio DMAC device nodes
arm64: dts: renesas: hihope-rzg2-ex: Let the board specific DT decide about pciec1
arm64: dts: renesas: r8a774b1: Add PCIe device nodes
arm64: dts: renesas: r8a774b1: Add all MSIOF nodes
arm64: dts: renesas: r8a774b1: Add RWDT node
arm64: dts: renesas: Add support for Advantech idk-1110wr LVDS panel
arm64: dts: renesas: hihope-rzg2-ex: Add LVDS support
arm64: dts: renesas: hihope-rzg2-ex: Enable backlight
arm64: dts: renesas: r8a774b1: Add PWM device nodes
arm64: dts: renesas: r8a774b1: Add FDP1 device nodes
arm64: dts: renesas: r8a774b1-hihope-rzg2n: Add display clock properties
arm64: dts: renesas: r8a774b1: Add HDMI encoder instance
arm64: dts: renesas: r8a774b1: Add DU device to DT
arm64: dts: renesas: hihope-common: Move du clk properties out of common dtsi
...
Link: https://lore.kernel.org/r/20191018101136.26350-4-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
show more ...
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Revision tags: v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8 |
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| #
54ce17dd |
| 05-Sep-2019 |
Biju Das <biju.das@bp.renesas.com> |
dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions
Add all RZ/G2N Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2d ("List of Clocks [RZ/G2N]") of the RZ/G2N Hardware User's
M
dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions
Add all RZ/G2N Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2d ("List of Clocks [RZ/G2N]") of the RZ/G2N Hardware User's
Manual.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1567666360-28035-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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