| e06a177d | 16-Dec-2025 |
Rob Herring (Arm) <robh@kernel.org> |
arm64: dts: xilinx: Drop "label" property on dlg,slg7xl45106
The "label" property is not documented for the dlg,slg7xl45106. Nor is it common to use for GPIO controllers. So drop it.
Signed-off-by:
arm64: dts: xilinx: Drop "label" property on dlg,slg7xl45106
The "label" property is not documented for the dlg,slg7xl45106. Nor is it common to use for GPIO controllers. So drop it.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20251216175914.2791200-1-robh@kernel.org
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| c1971799 | 25-Nov-2025 |
Tomas Melin <tomas.melin@vaisala.com> |
Revert "arm64: zynqmp: Add an OP-TEE node to the device tree"
This reverts commit 06d22ed6b6635b17551f386b50bb5aaff9b75fbe.
OP-TEE logic in U-Boot automatically injects a reserved-memory node along
Revert "arm64: zynqmp: Add an OP-TEE node to the device tree"
This reverts commit 06d22ed6b6635b17551f386b50bb5aaff9b75fbe.
OP-TEE logic in U-Boot automatically injects a reserved-memory node along with optee firmware node to kernel device tree. The injection logic is dependent on that there is no manually defined optee node. Having the node in zynqmp.dtsi effectively breaks OP-TEE's insertion of the reserved-memory node, causing memory access violations during runtime.
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20251125-revert-zynqmp-optee-v1-1-d2ce4c0fcaf6@vaisala.com
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| 138cb5c1 | 11-Nov-2025 |
Neal Frager <neal.frager@amd.com> |
arm64: dts: xilinx: fix zynqmp opp-table-cpu
Since the following commit, the zynqmp clk driver uses the common divider_round_rate() when determining the appropriate clock divider for a requested clo
arm64: dts: xilinx: fix zynqmp opp-table-cpu
Since the following commit, the zynqmp clk driver uses the common divider_round_rate() when determining the appropriate clock divider for a requested clock frequency: https://github.com/torvalds/linux/commit/1fe15be1fb613534ecbac5f8c3f8744f757d237d
This means that all the calculations will be in kHz when determining the appropriate clock divider for a given cpufreq request. The problem with this is that the zynqmp.dtsi and zynqmp-clk-ccf.dtsi files have frequency definitions in Hz, so when dividing requested values in kHz, errors can occur with the rounding.
For example, the current pss_ref_clk frequency is 33333333 Hz which generates a cpufreq parent clock frequency of 1199999988 Hz which is the same as the highest opp-table-cpu frequency in the zynqmp.dtsi.
But if a user requests the value 1199999 kHz as recommended in the available frequencies:
root@zynqmp:/sys/kernel/tracing# cat /sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies 299999 399999 599999 1199999 root@zynqmp:/ # echo 1199999 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed
The calculation will be: 1199999988 / 1199999000 = 1.000001
This will get rounded up to a divider value of 2 giving the following result.
root@zynqmp:/ # cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq 599999
Also, if a user tries to work around this calculation by using any larger values, it still will not fix the problem because the driver will use the largest opp in kHz which leads to the same calculation error.
User requests 1200000 root@zynqmp:/ # echo 1200000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed
Driver converts any value greater than 1199999 to the largest opp which is 1199999 and then calculates the divider value with the same calculation.
The calculation will still be: 1199999988 / 1199999000 = 1.000001
This will get rounded up to a divider value of 2 giving the following result.
root@zynqmp:/ # cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq 599999
This means there is no way to configure the zynqmp for the fastest opp using the current dtsi files.
To fix this issue, this patch updates the zynqmp opp-table-cpu and pss_ref_clk, so the clock rates are calculated correctly.
root@zynqmp:/sys/kernel/tracing# cat /sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies 300000 400000 600000 1200000 root@zynqmp:/ # echo 1200000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed root@zynqmp:/ # cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq 1200000
Signed-off-by: Neal Frager <neal.frager@amd.com> Acked-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20251111070555.1169130-1-neal.frager@amd.com
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| 0e819604 | 08-Sep-2025 |
Michal Simek <michal.simek@amd.com> |
arm64: versal-net: Describe L1/L2/L3/LLC caches
Add missing cache layout description.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f740bf2d0af1e7e50d76196ec050
arm64: versal-net: Describe L1/L2/L3/LLC caches
Add missing cache layout description.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f740bf2d0af1e7e50d76196ec050c0fdbeceb049.1757338426.git.michal.simek@amd.com
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| eb4a09d8 | 02-Sep-2025 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Describe ethernet controllers via aliases on SOM
Add ethernet aliases to CC (Carrier card) description to create a connection which is used by U-BOOT (fdt_fixup_ethernet()) for updati
arm64: zynqmp: Describe ethernet controllers via aliases on SOM
Add ethernet aliases to CC (Carrier card) description to create a connection which is used by U-BOOT (fdt_fixup_ethernet()) for updating local-mac-address in DT. On Kria SOM MAC address is read from i2c eeprom at start and based on it environment variables are created. Without creating aliases U-Boot is not able to inject local-mac-address DT property and OS won't get the same MAC address unless another i2c read is happening in OS. Also aliases are using string not phandle (because of dtso) that's why full path has to be provided but that shouldn't be a big issue because location of ethernet controller is fixed.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/72304150f87fd5e3338e31e2be8cf5d29955cc02.1756799774.git.michal.simek@amd.com
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| 767ecf9d | 02-Sep-2025 |
Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> |
arm64: zynqmp: Revert usb node drive strength and slew rate for zcu106
On a few zcu106 boards USB devices (Dell MS116 USB Optical Mouse, Dell USB Entry Keyboard) are not enumerated on linux boot due
arm64: zynqmp: Revert usb node drive strength and slew rate for zcu106
On a few zcu106 boards USB devices (Dell MS116 USB Optical Mouse, Dell USB Entry Keyboard) are not enumerated on linux boot due to commit 'b8745e7eb488 ("arm64: zynqmp: Fix usb node drive strength and slew rate")'.
To fix it as a workaround revert to working version and then investigate at board level why drive strength from 12mA to 4mA and slew from fast to slow is not working.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85a70cb014ec1f07972fccb60b875596eeaa6b5c.1756799774.git.michal.simek@amd.com
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| 0e3f9140 | 02-Sep-2025 |
Quanyang Wang <quanyang.wang@windriver.com> |
arm64: zynqmp: Disable coresight by default
When secure-boot mode of bootloader is enabled, the registers of coresight are not permitted to access that's why disable it by default.
Signed-off-by: Q
arm64: zynqmp: Disable coresight by default
When secure-boot mode of bootloader is enabled, the registers of coresight are not permitted to access that's why disable it by default.
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7e308b8efe977c4912079b4d1b1ab3d24908559e.1756799774.git.michal.simek@amd.com
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| f4c3831b | 18-Jul-2025 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Enable PSCI 1.0
TF-A is using PSCI 1.0 version for quite a long time but it was never reflected in DT.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.or
arm64: zynqmp: Enable PSCI 1.0
TF-A is using PSCI 1.0 version for quite a long time but it was never reflected in DT.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/32be8050838512d4340486227c32f38298ddde57.1752839409.git.michal.simek@amd.com
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| 722a3df1 | 18-Jul-2025 |
Rohit Visavalia <rohit.visavalia@amd.com> |
arm64: zynqmp: Enable DP for zcu100, zcu102, zcu104, zcu111
Upstream DP DT binding enforcing dp-connector and port description to operate properly.
Signed-off-by: Rohit Visavalia <rohit.visavalia@a
arm64: zynqmp: Enable DP for zcu100, zcu102, zcu104, zcu111
Upstream DP DT binding enforcing dp-connector and port description to operate properly.
Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0ac8df0c942ed9068e0b60a840fee6b9f7df2293.1752835502.git.michal.simek@amd.com
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| 7cf18a36 | 18-Jul-2025 |
Vishal Patel <vishal.patel@amd.com> |
arm64: zynqmp: Fix pwm-fan polarity
The correct operating mode for the fan is inversed (1). The previous pwm driver implementation had a bug and the polarity information was propagated incorrectly t
arm64: zynqmp: Fix pwm-fan polarity
The correct operating mode for the fan is inversed (1). The previous pwm driver implementation had a bug and the polarity information was propagated incorrectly to the kernel. The normal (0) polarity specified in the device tree was incorrectly clearing the polarity bit in the counter control register. After the bug fix, setting the polarity to inversed (1) in the device tree will clear the polarity bit. Also provide label for custom description based on this SOM.
Signed-off-by: Vishal Patel <vishal.patel@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e6dc9ce1e0b97c9d9b073c323cc94a5d7a88b94a.1752835502.git.michal.simek@amd.com
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| c7d5ca72 | 18-Jul-2025 |
Paul Alvin <alvin.paulp@amd.com> |
arm64: zynqmp: Add cap-mmc-hw-reset and no-sd, no-sdio property to eMMC
Add "cap-mmc-hw-reset" property to the eMMC DT node to perform the eMMC device hardware reset. Also, add "no-sd", "no-sdio" pr
arm64: zynqmp: Add cap-mmc-hw-reset and no-sd, no-sdio property to eMMC
Add "cap-mmc-hw-reset" property to the eMMC DT node to perform the eMMC device hardware reset. Also, add "no-sd", "no-sdio" properties to eMMC DT node to skip unwanted sd, sdio related commands during initialization for eMMC device as this may lead to unnecessary register dump.
Signed-off-by: Paul Alvin <alvin.paulp@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/10132834c0509539b0d01ff5097591cd2e3ae125.1752835501.git.michal.simek@amd.com
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| 7044b13e | 18-Jul-2025 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Remove undocumented arasan,has-mdma property
arasan,has-mdma is not described in DT binding that's why remove it.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lor
arm64: zynqmp: Remove undocumented arasan,has-mdma property
arasan,has-mdma is not described in DT binding that's why remove it.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/6567a0855ad73b5ff01d9945063014fbacdcc845.1752835501.git.michal.simek@amd.com
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| 00acd6d4 | 18-Jul-2025 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Use generic spi@ name in zcu111-revA
DT schema requires to use spi@ name for SPI devices that's why fix it.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kern
arm64: zynqmp: Use generic spi@ name in zcu111-revA
DT schema requires to use spi@ name for SPI devices that's why fix it.
Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/95979240cf09929c81a6f74199b0cb7027dd8798.1752835501.git.michal.simek@amd.com
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| 01a86031 | 03-Feb-2025 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Use DT header for firmware constants
Firmware contants do not fit the purpose of bindings because they are not independent IDs for abstractions. They are more or less just contants wh
arm64: zynqmp: Use DT header for firmware constants
Firmware contants do not fit the purpose of bindings because they are not independent IDs for abstractions. They are more or less just contants which better to wire via header with DT which is using it. That's why copy header to platform folder (align macro) and use it locally.
Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c3f011812597f4c3095448726f5924b2334c7da1.1738600745.git.michal.simek@amd.com
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