arm64: dts: bst: enable eMMC controller in C1200Add mmc0 node for the DWCMSHC SDHCI controller with basic configuration(disabled by default) and fixed clock definition in bstc1200.dtsi.Enable mm
arm64: dts: bst: enable eMMC controller in C1200Add mmc0 node for the DWCMSHC SDHCI controller with basic configuration(disabled by default) and fixed clock definition in bstc1200.dtsi.Enable mmc0 with board-specific configuration including 8-bit buswidth and reserved SRAM bounce buffer on the CDCU1.0 ADAS 4C2G board.The bounce buffer in reserved SRAM addresses hardware constraintswhere the eMMC controller cannot access main system memory throughSMMU due to a hardware bug, and all DRAM is located outside the4GB boundary.Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>Acked-by: Gordon Ge <gordon.ge@bst.ai>Signed-off-by: Gordon Ge <gordon.ge@bst.ai>
show more ...
arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 boardAdd device tree support for the Black Sesame Technologies (BST) C1200CDCU1.0 ADAS 4C2G platform. This platform is base
arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 boardAdd device tree support for the Black Sesame Technologies (BST) C1200CDCU1.0 ADAS 4C2G platform. This platform is based on the BST C1200 SoCfamily.The changes include:- Adding a new BST device tree directory- Adding Makefile entries to build the BST platform device trees- Adding the device tree for the BST C1200 CDCU1.0 ADAS 4C2G boardThis board features a quad-core Cortex-A78 CPU, and various peripheralsincluding UART, and interrupt controller.Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>Signed-off-by: Arnd Bergmann <arnd@arndb.de>