History log of /linux/scripts/dtc/include-prefixes/arm64/blaize/blaize-blzp1600-cb2.dts (Results 1 – 19 of 19)
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# ab93e0dd 06-Aug-2025 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge branch 'next' into for-linus

Prepare input updates for 6.17 merge window.


# a7bee4e7 04-Aug-2025 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next

Merge an immutable branch between MFD, GPIO, Input and PWM to resolve
conflicts for the mer

Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next

Merge an immutable branch between MFD, GPIO, Input and PWM to resolve
conflicts for the merge window pull request.

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Revision tags: v6.16, v6.16-rc7, v6.16-rc6, v6.16-rc5, v6.16-rc4
# 74f1af95 29-Jun-2025 Rob Clark <robin.clark@oss.qualcomm.com>

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

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Revision tags: v6.16-rc3, v6.16-rc2
# c598d5eb 11-Jun-2025 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-misc-next

Backmerging to forward to v6.16-rc1

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


# 86e2d052 09-Jun-2025 Thomas Hellström <thomas.hellstrom@linux.intel.com>

Merge drm/drm-next into drm-xe-next

Backmerging to bring in 6.16

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


# 34c55367 09-Jun-2025 Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-next

Sync to v6.16-rc1, among other things to get the fixed size GENMASK_U*()
and BIT_U*() macros.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>


Revision tags: v6.16-rc1
# ec71f661 31-May-2025 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
"There are 11 newly supported SoCs, but these are all either new
v

Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
"There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straight reuses of the existing chip
in a new package:

- RK3562 is a new chip based on the old Cortex-A53 core, apparently a
low-cost version of the Cortex-A55 based RK3568/RK3566.

- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.

- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2
family

- Amlogic S6/S7/S7D

- Samsung Exynos7870 is an older chip similar to Exynos7885

- WonderMedia wm8950 is a minor variation on the wm8850 chip

- Amlogic s805y is almost idential to s805x

- Allwinner A523 is similar to A527 and T527

- Qualcomm MSM8926 is a variant of MSM8226

- Qualcomm Snapdragon X1P42100 is related to R1E80100

There are also 65 boards, including reference designs for the chips
above, this includes

- 12 new boards based on TI K3 series chips, most of them from
Toradex

- 10 devices using Rockchips RK35xx and PX30 chips

- 2 phones and 2 laptops based on Qualcomm Snapdragon designs

- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses

- 3 Samsung Galaxy phones based on Exynos7870

- 5 Allwinner based boards using a variety of ARMv8 chips

- 9 32-bit machines, each based on a different SoC family

Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets"

* tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits)
MAINTAINERS, mailmap: update Sven Peter's email address
arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency
arm64: dts: nuvoton: Add pinctrl
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
arm64: dts: blaize-blzp1600: Enable GPIO support
dt-bindings: clock: socfpga: convert to yaml
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3562 pcie unit addresses
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3576 pcie unit addresses
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
arm64: dts: mt6359: Rename RTC node to match binding expectations
arm64: dts: mt8365-evk: Add goodix touchscreen support
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
...

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Revision tags: v6.15, v6.15-rc7
# c07da6de 12-May-2025 Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>

arm64: dts: blaize-blzp1600: Enable GPIO support

Blaize BLZP1600 uses the custom silicon provided from
VeriSilicon to add GPIO support.
This interface is used to control signals on many other
periph

arm64: dts: blaize-blzp1600: Enable GPIO support

Blaize BLZP1600 uses the custom silicon provided from
VeriSilicon to add GPIO support.
This interface is used to control signals on many other
peripherals, such as Ethernet, USB, SD and eMMC.

Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
Link: https://lore.kernel.org/r/20250512133302.151621-1-nikolaos.pasaloukos@blaize.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Revision tags: v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2
# 1260ed77 08-Apr-2025 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-fixes into drm-misc-fixes

Backmerging to get updates from v6.15-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


Revision tags: v6.15-rc1
# 946661e3 05-Apr-2025 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge branch 'next' into for-linus

Prepare input updates for 6.15 merge window.


Revision tags: v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5
# 0b119045 26-Feb-2025 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v6.14-rc4' into next

Sync up with the mainline.


Revision tags: v6.14-rc4, v6.14-rc3, v6.14-rc2
# 9e676a02 05-Feb-2025 Namhyung Kim <namhyung@kernel.org>

Merge tag 'v6.14-rc1' into perf-tools-next

To get the various fixes in the current master.

Signed-off-by: Namhyung Kim <namhyung@kernel.org>


# 0410c612 28-Feb-2025 Lucas De Marchi <lucas.demarchi@intel.com>

Merge drm/drm-next into drm-xe-next

Sync to fix conlicts between drm-xe-next and drm-intel-next.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>


# 93c7dd1b 06-Feb-2025 Maxime Ripard <mripard@kernel.org>

Merge drm/drm-next into drm-misc-next

Bring rc1 to start the new release dev.

Signed-off-by: Maxime Ripard <mripard@kernel.org>


# ea9f8f2b 05-Feb-2025 Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-next

Sync with v6.14-rc1.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>


# c771600c 05-Feb-2025 Tvrtko Ursulin <tursulin@ursulin.net>

Merge drm/drm-next into drm-intel-gt-next

We need
4ba4f1afb6a9 ("perf: Generic hotplug support for a PMU with a scope")
in order to land a i915 PMU simplification and a fix. That landed in 6.12
and

Merge drm/drm-next into drm-intel-gt-next

We need
4ba4f1afb6a9 ("perf: Generic hotplug support for a PMU with a scope")
in order to land a i915 PMU simplification and a fix. That landed in 6.12
and we are stuck at 6.9 so lets bump things forward.

Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>

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# b3cc7428 26-Mar-2025 Jiri Kosina <jkosina@suse.com>

Merge branch 'for-6.15/amd_sfh' into for-linus

From: Mario Limonciello <mario.limonciello@amd.com>

Some platforms include a human presence detection (HPD) sensor. When
enabled and a user is detecte

Merge branch 'for-6.15/amd_sfh' into for-linus

From: Mario Limonciello <mario.limonciello@amd.com>

Some platforms include a human presence detection (HPD) sensor. When
enabled and a user is detected a wake event will be emitted from the
sensor fusion hub that software can react to.

Example use cases are "wake from suspend on approach" or to "lock
when leaving".

This is currently enabled by default on supported systems, but users
can't control it. This essentially means that wake on approach is
enabled which is a really surprising behavior to users that don't
expect it.

Instead of defaulting to enabled add a sysfs knob that users can
use to enable the feature if desirable and set it to disabled by
default.

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Revision tags: v6.14-rc1
# 4e517a6a 24-Jan-2025 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'soc-new-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new SoC support from Arnd Bergmann:
"Two new SoC families are added here, with devicetree files and a
little

Merge tag 'soc-new-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new SoC support from Arnd Bergmann:
"Two new SoC families are added here, with devicetree files and a
little bit of infrastructure to allow booting:

- Blaize BLZP1600 is an AI chip using custom GSP (Graph Streaming
Processor) cores for computation, and two small Cortex-A53 cores
that run the operating system.

- SpacemiT K1 is a 64-bit RISC-V chip, using eight custom RVA22
compatible CPU cores with vector support.

Also marketed at AI applications, it has a much slower NPU compared
to BLZP1600, but in turn focuses on the CPU performance"

* tag 'soc-new-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
riscv: dts: spacemit: move aliases to board dts
riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3
riscv: defconfig: enable SpacemiT SoC
riscv: dts: spacemit: add Banana Pi BPI-F3 board device tree
riscv: dts: add initial SpacemiT K1 SoC device tree
riscv: add SpacemiT SoC family Kconfig support
dt-bindings: serial: 8250: Add SpacemiT K1 uart compatible
dt-bindings: interrupt-controller: Add SpacemiT K1 PLIC
dt-bindings: timer: Add SpacemiT K1 CLINT
dt-bindings: riscv: add SpacemiT K1 bindings
dt-bindings: riscv: Add SpacemiT X60 compatibles
MAINTAINERS: setup support for SpacemiT SoC tree
MAINTAINER: Add entry for Blaize SoC
arm64: defconfig: Enable Blaize BLZP1600 platform
arm64: dts: Add initial support for Blaize BLZP1600 CB2
arm64: Add Blaize BLZP1600 SoC family
dt-bindings: arm: blaize: Add Blaize BLZP1600 SoC
dt-bindings: Add Blaize vendor prefix

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Revision tags: v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2
# 2e976f19 04-Dec-2024 Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>

arm64: dts: Add initial support for Blaize BLZP1600 CB2

Add support for the Blaize CB2 development board based on
the BLZP1600 SoC. This consists of a Carrier-Board-2 and a
System-on-Module.

Both B

arm64: dts: Add initial support for Blaize BLZP1600 CB2

Add support for the Blaize CB2 development board based on
the BLZP1600 SoC. This consists of a Carrier-Board-2 and a
System-on-Module.

Both BLZP1600 SoM and CB2 are available as products.
CB2 (Pathfinder) has multiple peripherals like UART, I2C,
SPI, GPIO, CSI (camera), DSI (display), USB-3.0 and Ethernet.

Enable support for the Cryptocell, UART and I2C which are
already fully supported by the drivers.

The blaize-blzp1600.dtsi is the common part for the SoC,
blaize-blzp1600-som.dtsi is the common part for the SoM and
blaize-blzp1600-cb2.dts is the board specific file.

Co-developed-by: James Cowgill <james.cowgill@blaize.com>
Signed-off-by: James Cowgill <james.cowgill@blaize.com>
Co-developed-by: Matt Redfearn <matt.redfearn@blaize.com>
Signed-off-by: Matt Redfearn <matt.redfearn@blaize.com>
Co-developed-by: Neil Jones <neil.jones@blaize.com>
Signed-off-by: Neil Jones <neil.jones@blaize.com>
Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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