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0eaed89c |
| 17-Aug-2026 |
Thomas Gleixner <tglx@kernel.org> |
Merge tag 'timers-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource
- Use designated initializers for sh_mtu2, sh_cmt, and sh_tmu, and dro
Merge tag 'timers-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource
- Use designated initializers for sh_mtu2, sh_cmt, and sh_tmu, and drop the unused initializer in the platform_device_id table for sh_mtu2 (Uwe Kleine-König)
- Remove redundant dev_err()/dev_err_probe() messages when devm_request_*_irq() fails, as the helper already logs an error message (Pan Chuang)
- Fix a boot hang on Allwinner D1 when a forced minimum delta is used with the sun4i timer (Felix Yan)
- Fix an IRQ leak in the cpuhp_setup_state() error path by freeing the IRQ on failure in the NXP PIT driver (WenTao Liang)
- Fix incorrect unmapping of shared MMIO between the clocksource and clockevent drivers. If one of them fails to initialize, the error path unmaps the shared MMIO region, leaving the other driver with an invalid mapping on clps711x (Guangshuo Li)
- Make the samsung_pwm driver compatible with PREEMPT_RT by replacing regular spinlocks with raw_spinlock_t in atomic contexts (Marek Szyprowski)
- Use __raw_readl() and __raw_writel() instead of ioread32() and iowrite32() to support SWAP_IO_SPACE in the rtl-otto driver (Rustam Adilov)
- Fix a missing clk_disable_unprepare() call in the timer initialization error path of the Armada driver (Yuho Choi)
Link: https://lore.kernel.org/lkml/75feea31-683d-45a1-87f4-ab045e0152ae@oss.qualcomm.com
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Revision tags: v7.2 |
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b4d85f86 |
| 15-Aug-2026 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 7.3 merge window.
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Revision tags: v7.2-rc7, v7.2-rc6, v7.2-rc5, v7.2-rc4 |
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76904fcc |
| 14-Jul-2026 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v7.2-rc3' into next
Sync up with mainline to pull in stable fixes to avoid merge conflicts.
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Revision tags: v7.2-rc3, v7.2-rc2 |
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00599d48 |
| 29-Jun-2026 |
Maarten Lankhorst <dev@lankhorst.se> |
Merge drm/drm-fixes into drm-misc-fixes
Pull in tag v7.2-rc1 so that drm-misc-fixes becomes useful again, and drm-misc-next-fixes can be closed.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
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Revision tags: v7.2-rc1 |
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9611c0ce |
| 19-Jun-2026 |
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> |
Merge commit '6beaec3aee9852438b89e4d7891caf5e84d45851' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-current
This pulls in the merge commit for MFD updates for v7.2.
Merge commit '6beaec3aee9852438b89e4d7891caf5e84d45851' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-current
This pulls in the merge commit for MFD updates for v7.2. The PR contains a build-time dependency of one of the GPIO commits that will follow.
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aab799b1 |
| 17-Jun-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann: "There are fewer devicetree updates this time that the last few ones,
Merge tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann: "There are fewer devicetree updates this time that the last few ones, with five SoC types getting added:
- Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using four Cortex-A55 and one Cortex-A78 core, which is a significant upgrade from older generations
- ZTE zx297520v3 is an older low-end wireless SoC using a single Cortex-A53 core, which so far can only run 32-bit kernels. This brings back the ZX family of chips that was removed in 2021 after support for the original zx296702 and zx296718 chips was never completed.
- Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N (R8A77965) automotive SoC.
- Apple t8122 (M3) is the 2023 generation of their laptop SoCs, which has now been reverse-engineered to the point of having initial kernel support for five laptop models.
- ASPEED AST27xx is their first baseboard managment controller using a 64-bit core, the Cortex-A35, following earlier generations using ARMv5/v6/v7 CPUs.
These all come with one or more initial boards, and in total there are 39 new boards getting added across SoC families, including:
- Two NAS boxes using the old Cortina Systems Gemini SoC based on an ARMv4 FA526 CPU core
- 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A SoCs from Variscite, Toradex and SolidRun, plus a number of overlays for combinations with additional boards
- One new carrier board and SoM using TI K3 AM62x, in addition to new overlays for older SoMs
- Two new boards using Spacemit K3 (no relation with TI) RISC-V SoCs.
- Three phones from Google, Nothing and Motorola, all using Qualcomm Snapdragon SoCs
- AST26xx BMC support for two server boards
While there is still a significant number of patches improving hardware support for the existing boards across vendors (NXP, Qualcomm, Renesas, Rockchips, Mediatek, ...), a much smaller number of cleanups and warning fixes have made it in this time"
* tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (665 commits) arm64: dts: aspeed: Fix duplicate pinctrl labels and address scheme arm64: dts: bst: enable eMMC controller in C1200 dt-bindings: display/lvds-codec: add ti,sn65lvds93 arm64: dts: allwinner: a523: Add missing GPIO interrupt arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap arm64: dts: aspeed: Add initial AST27xx SoC device tree arm64: Kconfig: Add ASPEED SoC family Kconfig support dt-bindings: arm: aspeed: Add AST2700 board compatible arm64: dts: allwinner: a523: add gpadc node arm64: dts: allwinner: Add EL2 virtual timer interrupt ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays arm64: dts: imx93-var-som-symphony: enable ADC arm64: dts: imx93-var-som-symphony: enable TPM3 PWM arm64: dts: imx93-var-som-symphony: keep RGB_SEL low arm64: dts: imx93-var-som-symphony: enable UART7 arm64: dts: imx93-var-som-symphony: add TPM support arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling ...
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Revision tags: v7.1, v7.1-rc7, v7.1-rc6, v7.1-rc5 |
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e8a53f2d |
| 20-May-2026 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'zx29-dts-for-7.2' of https://gitlab.com/stefandoesinger/zx297520-kernel into soc/dt
ARM: dts: zte: zx297520v3 device tree for 7.2
This pull request adds board bindings and DTS files for
Merge tag 'zx29-dts-for-7.2' of https://gitlab.com/stefandoesinger/zx297520-kernel into soc/dt
ARM: dts: zte: zx297520v3 device tree for 7.2
This pull request adds board bindings and DTS files for ZTE zx297520v3 boards as well as one initial device (D-Link DWR 932M) based on this board.
* tag 'zx29-dts-for-7.2' of https://gitlab.com/stefandoesinger/zx297520-kernel: ARM: dts: zte: Add D-Link DWR-932M support dt-bindings: arm: zte: Add D-Link DWR932M board based on zx297520v3 SoC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v7.1-rc4, v7.1-rc3, v7.1-rc2, v7.1-rc1, v7.0, v7.0-rc7, v7.0-rc6, v7.0-rc5, v7.0-rc4, v7.0-rc3, v7.0-rc2, v7.0-rc1, v6.19, v6.19-rc8 |
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7d1f68e8 |
| 28-Jan-2026 |
Stefan Dösinger <stefandoesinger@gmail.com> |
ARM: dts: zte: Add D-Link DWR-932M support
This adds base DT definition for zx297520v3 and one board that consumes it.
The stock kernel does not use the armv7 timer, but it seems to work fine. The
ARM: dts: zte: Add D-Link DWR-932M support
This adds base DT definition for zx297520v3 and one board that consumes it.
The stock kernel does not use the armv7 timer, but it seems to work fine. The board has other board-specific timers that would need a driver and I see no reason to bother with them since the arm standard timer works.
The caveat is the non-standard GIC setup needed to handle the timer's level-low PPI. This is the responsibility of the boot loader and documented in Documentation/arch/arm/zte/zx297520v3.rst.
Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com> ---
Changes in v8: Remove redundant label, use "arm,pl011" for uart0 and 2 too. v6: Squash board + timer + uart patches into one v5: Prepend the SoC name in the device specific DTS filename. v4: Declare all uarts Remove the UART aliases for now. I can revisit this when I get my hands on a board that exposes two UARTs.
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