History log of /linux/drivers/soc/Makefile (Results 1 – 25 of 84)
Revision Date Author Comments
# 2e51c645 22-Oct-2026 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
"There are lots of minor updates for driver subsystems managed throu

Merge tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
"There are lots of minor updates for driver subsystems managed through
the soc tree (turris-omnia platform, cache driver, tee drivers,
arm-cci, bus, memory) as well as soc vendor specific drivers
(starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
nvidia).

The more notable changes are:

- Larger updates for Qualcomm SoCs including support for SM8950
(Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424

- Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
MT8167 in existing drivers

- Arm SCMI firmware driver support for ACPI PCC transport and module
autoloading of protocol specific drivers

- Apple crash log support for CrgA embedded controller"

* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
platform: cznic: turris-omnia-mcu: stop button emulation producers
cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
soc: mpfs: use kref cleanup on probe failure
arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
soc: fsl: dpio: Free the IRQ before releasing the I/O object
soc: fsl: dpio: Fix cleanup on IRQ registration failure
bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
bus: fsl-mc: drop the fwnode links of the dpmacs nodes
soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
soc: qcom: ubwc: Add Kalambo UBWC config
firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
...

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# 96b35a12 28-Aug-2026 Changhuang Liang <changhuang.liang@starfivetech.com>

soc: starfive: Add socinfo driver for JHB100 SoC

Add a socinfo driver for the JHB100 SoC, exposing the SoC family, ID and
revision through the SoC bus. It is currently used to distinguish the two
re

soc: starfive: Add socinfo driver for JHB100 SoC

Add a socinfo driver for the JHB100 SoC, exposing the SoC family, ID and
revision through the SoC bus. It is currently used to distinguish the two
revisions, A0 and A1.

The driver binds to the sys0 system controller node. That region only
contains the PLL controls, this revision ID register and a few debug
registers, so rather than describing an extra child node in the
devicetree, the sys0 PLL device is instantiated from here as an MFD cell.
The PLL driver then picks up the regmap from its parent's DT node.

Note that CONFIG_STARFIVE_JHB100_SOCINFO is therefore a build-time
prerequisite for the sys0 PLL clocks; see CLK_STARFIVE_JHB100_PLL.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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# f8315841 02-Sep-2026 Marek Vasut <marex@nabladev.com>

soc: st: Add STM32MP2 SYSCFG driver

Add trivial SYSCFG driver for ST STM32MP25xx, which binds drivers
to its subnodes. This is currently used to bind USB PHY drivers to
subnodes described in the SYS

soc: st: Add STM32MP2 SYSCFG driver

Add trivial SYSCFG driver for ST STM32MP25xx, which binds drivers
to its subnodes. This is currently used to bind USB PHY drivers to
subnodes described in the SYSCFG DT node.

Signed-off-by: Marek Vasut <marex@nabladev.com>
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Acked-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20260902124018.606544-2-marex@nabladev.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

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# 6333f297 21-May-2025 Arnd Bergmann <arnd@arndb.de>

Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux into soc/drivers

RISC-V SoC for v6.16

Sophgo:

Add support for SG2044 TOP syscon device. The SG2044 TOP
device provide PLL

Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux into soc/drivers

RISC-V SoC for v6.16

Sophgo:

Add support for SG2044 TOP syscon device. The SG2044 TOP
device provide PLL clock function in its area.

Add RTC support for CV1800 series SoC. The device
is called RTC, but contains control registers of other
HW blocks in its address space, most notably of
Power-on-Reset (PoR) module, DW8051 IP (MCU core),
accompanying SRAM, hence putting it in SoC subsystem.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux:
soc: sophgo: cv1800: rtcsys: New driver (handling RTC only)
dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series
soc: sophgo: sg2044: Add support for SG2044 TOP syscon device

Link: https://lore.kernel.org/r/MA0P287MB2262B041A26A0F5EAD1E296CFE91A@MA0P287MB2262.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# f18198c0 18-Apr-2025 Inochi Amaoto <inochiama@gmail.com>

soc: sophgo: sg2044: Add support for SG2044 TOP syscon device

The SG2044 TOP device provide PLL clock function in its area.
Add a mfd definition for it.

Link: https://lore.kernel.org/r/202504180203

soc: sophgo: sg2044: Add support for SG2044 TOP syscon device

The SG2044 TOP device provide PLL clock function in its area.
Add a mfd definition for it.

Link: https://lore.kernel.org/r/20250418020325.421257-3-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

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# 96f94587 03-May-2025 Alexey Charkov <alchark@gmail.com>

soc: Add VIA/WonderMedia SoC identification driver

Add a small SOC bus driver to parse the chip ID and revision made
available on VIA/WonderMedia SoCs via their system configuration
controller's SCC

soc: Add VIA/WonderMedia SoC identification driver

Add a small SOC bus driver to parse the chip ID and revision made
available on VIA/WonderMedia SoCs via their system configuration
controller's SCC_ID register.

This is intended to select appropriate sets of on-chip device quirks
at runtime, as it has been found that even within the same SoC
version there can be register-incompatible differences, such as
with the SDMMC controller on WM8505 rev. A0-A1 vs. rev. A2.

The list of SoC versions is compiled from various vendor source dumps
and not all of them have corresponding mainline driver support.
Some of them also have been seen with varying on-chip markings while
sharing the same hardware chip ID's (as is the case with e.g. WM8850
vs. WM8950). In such cases the selection of names to use here among
those seen in various source dumps and chip markings was arbitrary.

Suggested by Krzysztof at [1] - thanks a lot!

[1] https://lore.kernel.org/all/14de236b-e2a7-4bde-986d-1e5ffddd01b4@kernel.org/

Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-2-2daa9056fa10@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

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# 075dbe9f 26-Sep-2024 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC update from Arnd Bergmann:
"Convert ep93xx to devicetree

This concludes a long journey towards re

Merge tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC update from Arnd Bergmann:
"Convert ep93xx to devicetree

This concludes a long journey towards replacing the old board files
with devictree description on the Cirrus Logic EP93xx platform.

Nikita Shubin has been working on this for a long time, for details
see the last post on

https://lore.kernel.org/lkml/20240909-ep93xx-v12-0-e86ab2423d4b@maquefel.me/"

* tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits)
dt-bindings: gpio: ep9301: Add missing "#interrupt-cells" to examples
MAINTAINERS: Update EP93XX ARM ARCHITECTURE maintainer
soc: ep93xx: drop reference to removed EP93XX_SOC_COMMON config
net: cirrus: use u8 for addr to calm down sparse
dmaengine: cirrus: use snprintf() to calm down gcc 13.3.0
dmaengine: ep93xx: Fix a NULL vs IS_ERR() check in probe()
pinctrl: ep93xx: Fix raster pins typo
spi: ep93xx: update kerneldoc comments for ep93xx_spi
clk: ep93xx: Fix off by one in ep93xx_div_recalc_rate()
clk: ep93xx: add module license
dmaengine: cirrus: remove platform code
ASoC: cirrus: edb93xx: Delete driver
ARM: ep93xx: soc: drop defines
ARM: ep93xx: delete all boardfiles
ata: pata_ep93xx: remove legacy pinctrl use
pwm: ep93xx: drop legacy pinctrl
ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms
ARM: dts: ep93xx: Add EDB9302 DT
ARM: dts: ep93xx: add ts7250 board
ARM: dts: add Cirrus EP93XX SoC .dtsi
...

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# 6eab0ce6 09-Sep-2024 Nikita Shubin <nikita.shubin@maquefel.me>

soc: Add SoC driver for Cirrus ep93xx

Add an SoC driver for the ep93xx. Currently there is only one thing
not fitting into any other framework, and that is the swlock setting.

Used for clock settin

soc: Add SoC driver for Cirrus ep93xx

Add an SoC driver for the ep93xx. Currently there is only one thing
not fitting into any other framework, and that is the swlock setting.

Used for clock settings, pinctrl and restart.

Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 2f057261 25-Aug-2024 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

soc: versatile: enable compile testing

Enable compile testing for broader build coverage. None of the drivers
use anything from "asm", so code should build everywhere.
CONFIG_PLAT_VERSATILE is bein

soc: versatile: enable compile testing

Enable compile testing for broader build coverage. None of the drivers
use anything from "asm", so code should build everywhere.
CONFIG_PLAT_VERSATILE is being selected by driver dependencies
(CONFIG_ARCH_INTEGRATOR and CONFIG_ARCH_REALVIEW), so directory can be
always added to Makefile targets without impacting other configurations.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20240825-soc-dev-fixes-v1-4-ff4b35abed83@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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# 915fb0e3 28-Mar-2024 Yangyu Chen <cyy@cyyself.name>

soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210

Since SOC_FOO should be deprecated from patch [1], and cleanup for other
SoCs is already in the mailing list [2,3,4], we remove the

soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210

Since SOC_FOO should be deprecated from patch [1], and cleanup for other
SoCs is already in the mailing list [2,3,4], we remove the use of
SOC_CANAAN and use ARCH_CANAAN for SoCs vendored by Canaan instead from now
on. Thus, we should also change the Makefile here to use ARCH_CANAAN.

Then, since we have introduced SOC_CANAAN_K210 for K210-specific drivers,
we should replace its drivers depends on SOC_CANAAN_K210 and default select
when it has the symbol SOC_CANAAN_K210.

[1] https://lore.kernel.org/linux-riscv/20221121221414.109965-1-conor@kernel.org/
[2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/
[3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/
[4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/

Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Acked-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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# 971f128b 12-Oct-2023 Conor Dooley <conor.dooley@microchip.com>

soc: sifive: shunt ccache driver to drivers/cache

Move the ccache driver over to drivers/cache, out of the drivers/soc
dumping ground, to this new collection point for cache controller
drivers.

Rev

soc: sifive: shunt ccache driver to drivers/cache

Move the ccache driver over to drivers/cache, out of the drivers/soc
dumping ground, to this new collection point for cache controller
drivers.

Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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# bb2974ff 12-Aug-2023 Arnd Bergmann <arnd@arndb.de>

Merge tag 'hisi-drivers-for-6.6' of https://github.com/hisilicon/linux-hisi into soc/drivers

HiSilicon driver updates for v6.6

- Add HCCS driver for HiSilicon Kunpeng SoC and document the sysfs des

Merge tag 'hisi-drivers-for-6.6' of https://github.com/hisilicon/linux-hisi into soc/drivers

HiSilicon driver updates for v6.6

- Add HCCS driver for HiSilicon Kunpeng SoC and document the sysfs description

* tag 'hisi-drivers-for-6.6' of https://github.com/hisilicon/linux-hisi:
doc: soc: hisilicon: Add Kunpeng HCCS driver documentation
soc: hisilicon: add sysfs entry to query information of HCCS
soc: hisilicon: Support HCCS driver on Kunpeng SoC

Link: https://lore.kernel.org/r/64D605DE.2070303@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 886bdf9c 08-Aug-2023 Huisong Li <lihuisong@huawei.com>

soc: hisilicon: Support HCCS driver on Kunpeng SoC

The Huawei Cache Coherence System (HCCS) is a multi-chip interconnection
bus protocol. This driver is aimed to support some features about HCCS on

soc: hisilicon: Support HCCS driver on Kunpeng SoC

The Huawei Cache Coherence System (HCCS) is a multi-chip interconnection
bus protocol. This driver is aimed to support some features about HCCS on
Kunpeng SoC, like, querying the health status of HCCS.

This patch adds the probing of HCCS driver, and obtains all HCCS port
information by the dimension of chip and die on platform.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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# 7ed363cd 26-Jul-2023 Arnd Bergmann <arnd@arndb.de>

genpd: move owl-sps-helper.c from drivers/soc

Moving only one of the two files in drivers/soc/actions to drivers/genpd
caused a link failure in allmodconfig, as drivers/genpd is entered
for compile

genpd: move owl-sps-helper.c from drivers/soc

Moving only one of the two files in drivers/soc/actions to drivers/genpd
caused a link failure in allmodconfig, as drivers/genpd is entered
for compile testing, but drivers/soc/actions accidentally got skipped:

x86_64-linux-gnu-ld: vmlinux.o: in function `owl_sps_set_power':
owl-sps.c:(.text+0x16e259d): undefined reference to `owl_sps_set_pg'

Move the other one as well to allow build testing to work correctly.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 00eb53b0 23-Jul-2023 Arnd Bergmann <arnd@arndb.de>

soc: starfive: remove stale Makefile entry

After the only starfive driver was moved out to the genpd subsystem, we get
a build failure:

scripts/Makefile.build:41: drivers/soc/starfive/Makefile: No

soc: starfive: remove stale Makefile entry

After the only starfive driver was moved out to the genpd subsystem, we get
a build failure:

scripts/Makefile.build:41: drivers/soc/starfive/Makefile: No such file or directory

Fixes: f3fb16291f486 ("soc: starfive: Move the power-domain driver to the genpd dir")
Reported=by: kernel test robot <lkp@intel.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 7dbb4a38 01-Feb-2023 Jonathan Neuschäfer <j.neuschaefer@gmx.net>

soc: nuvoton: Add SoC info driver for WPCM450

Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
information such as the SoC revision.

Usage example:

# grep . /sys/devices/soc0/*

soc: nuvoton: Add SoC info driver for WPCM450

Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
information such as the SoC revision.

Usage example:

# grep . /sys/devices/soc0/*
/sys/devices/soc0/family:Nuvoton NPCM
/sys/devices/soc0/revision:A3
/sys/devices/soc0/soc_id:WPCM450

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Link: https://lore.kernel.org/r/20221031223926.241641-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230201051717.1005938-1-joel@jms.id.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# f3460326 20-Jan-2023 Conor Dooley <conor.dooley@microchip.com>

Merge patch series "JH7110 PMU Support"

Walker Chen <walker.chen@starfivetech.com> says:

Add the PMU (Power Management Unit) controller driver for the
StarFive JH7110 SoC. In order to meet low powe

Merge patch series "JH7110 PMU Support"

Walker Chen <walker.chen@starfivetech.com> says:

Add the PMU (Power Management Unit) controller driver for the
StarFive JH7110 SoC. In order to meet low power requirements, PMU is
designed for including multiple PM domains that can be used for power
gating of selected IP blocks for power saving by reduced leakage
current.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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# 08b9a94e 19-Jan-2023 Walker Chen <walker.chen@starfivetech.com>

soc: starfive: Add StarFive JH71XX pmu driver

Add pmu driver for the StarFive JH71XX SoC.

As the power domains provider, the Power Management Unit (PMU) is
designed for including multiple PM domain

soc: starfive: Add StarFive JH71XX pmu driver

Add pmu driver for the StarFive JH71XX SoC.

As the power domains provider, the Power Management Unit (PMU) is
designed for including multiple PM domains that can be used for power
gating of selected IP blocks for power saving by reduced leakage
current. It accepts software encourage command to switch the power mode
of SoC.

Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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# 6635e916 20-Dec-2022 Emil Renner Berthing <kernel@esmil.dk>

soc: sifive: ccache: Add StarFive JH7110 support

This adds support for the StarFive JH7110 SoC which also
features this SiFive cache controller.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk

soc: sifive: ccache: Add StarFive JH7110 support

This adds support for the StarFive JH7110 SoC which also
features this SiFive cache controller.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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# b82621ac 11-Nov-2022 Yinbo Zhu <zhuyinbo@loongson.cn>

soc: loongson: add GUTS driver for loongson-2 platforms

The global utilities block controls PCIE device enabling, alternate
function selection for multiplexed signals, consistency of HDA, USB
and PC

soc: loongson: add GUTS driver for loongson-2 platforms

The global utilities block controls PCIE device enabling, alternate
function selection for multiplexed signals, consistency of HDA, USB
and PCIE, configuration of memory controller, rtc controller, lio
controller, and clock control.

This patch adds a driver to manage and access global utilities block
for LoongArch architecture Loongson-2 SoCs. Initially only reading SVR
and registering soc device are supported. Other guts accesses, such
as reading firmware configuration by default, should eventually be
added into this driver as well.

Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 64f89dfa 20-May-2022 Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>

soc: fujitsu: Add A64FX diagnostic interrupt driver

Register the NMI/IRQ corresponding to the A64FX's device definition
dedicated to diagnostic interrupts, so that when this interrupt is
sent using

soc: fujitsu: Add A64FX diagnostic interrupt driver

Register the NMI/IRQ corresponding to the A64FX's device definition
dedicated to diagnostic interrupts, so that when this interrupt is
sent using the BMC, it causes a panic. This can be used to obtain
a kernel dump.

Signed-off-by: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Link: https://lore.kernel.org/r/20220520074119.3574753-2-hasegawa-hitomi@fujitsu.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 96479c09 03-Jun-2022 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more ARM multiplatform updates from Arnd Bergmann:
"The second part of the multiplatform changes n

Merge tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more ARM multiplatform updates from Arnd Bergmann:
"The second part of the multiplatform changes now converts the
Intel/Marvell PXA platform along with the rest. The patches went
through several rebases before the merge window as bugs were found, so
they remained separate.

This has to touch a lot of drivers, in particular the touchscreen,
pcmcia, sound and clk bits, to detach the driver files from the
platform and board specific header files"

* tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
ARM: pxa/mmp: remove traces of plat-pxa
ARM: pxa: convert to multiplatform
ARM: pxa/sa1100: move I/O space to PCI_IOBASE
ARM: pxa: remove support for MTD_XIP
ARM: pxa: move mach/*.h to mach-pxa/
ARM: PXA: fix multi-cpu build of xsc3
ARM: pxa: move plat-pxa to drivers/soc/
ARM: mmp: rename pxa_register_device
ARM: mmp: remove tavorevb board support
ARM: pxa: remove unused mach/bitfield.h
ARM: pxa: move clk register definitions to driver
ARM: pxa: move smemc register access from clk to platform
cpufreq: pxa3: move clk register access to clk driver
ARM: pxa: remove get_clk_frequency_khz()
ARM: pxa: pcmcia: move smemc configuration back to arch
ASoC: pxa: i2s: use normal MMIO accessors
ASoC: pxa: ac97: use normal MMIO accessors
ASoC: pxa: use pdev resource for FIFO regs
Input: wm97xx - get rid of irq_enable method in wm97xx_mach_ops
Input: wm97xx - switch to using threaded IRQ
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# d4a3b442 13-May-2022 Arnd Bergmann <arnd@arndb.de>

Merge tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers

Powerdomain fixes and improvements, some GRF compatible properties
and a rk

Merge tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers

Powerdomain fixes and improvements, some GRF compatible properties
and a rk3566 GRF clocksource default setup.

* tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: Fix compile-testing SoC drivers
soc: rockchip: power-domain: Replace dsb() with smb()
soc: rockchip: Clean up Kconfig whitespace
soc: rockchip: set dwc3 clock for rk3566
dt-bindings: soc: rockchip: add rk3566-pipe-grf compatible
soc: rockchip: pm_domains: Fix typo in comment
dt-bindings: soc: rockchip: add naneng combo phy register compatible

Link: https://lore.kernel.org/r/3998951.tdWV9SEqCh@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 64dbc4dd 20-Sep-2019 Arnd Bergmann <arnd@arndb.de>

ARM: pxa: move plat-pxa to drivers/soc/

There are two drivers in arch/arm/plat-pxa: mfp and ssp. Both
of them should ideally not be needed at all, as there are
proper subsystems to replace them.

OT

ARM: pxa: move plat-pxa to drivers/soc/

There are two drivers in arch/arm/plat-pxa: mfp and ssp. Both
of them should ideally not be needed at all, as there are
proper subsystems to replace them.

OTOH, they are self-contained and can simply be normal
SoC drivers, so move them over there to eliminate one more
of the plat-* directories.

Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> (mach-pxa)
Acked-by: Lubomir Rintel <lkundrak@v3.sk> (mach-mmp)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# cbb0f001 01-May-2022 Sven Peter <sven@svenpeter.dev>

soc: apple: Always include Makefile

We want to allow the code inside drivers/soc/apple to be compiled with
COMPILE_TEST but this will currently result in linking errors because
ARCH_APPLE is not set

soc: apple: Always include Makefile

We want to allow the code inside drivers/soc/apple to be compiled with
COMPILE_TEST but this will currently result in linking errors because
ARCH_APPLE is not set and make will never recurse into
drivers/soc/apple.
Let's just unconditionally recurse into apple/ since all drivers
in there are guarded by config options anyways.

Signed-off-by: Sven Peter <sven@svenpeter.dev>

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