Merge tag 'pwm/for-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux

Pull pwm updates from Uwe Kleine-König:
"This time around the pwm changes for the next release contain t

Merge tag 'pwm/for-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux

Pull pwm updates from Uwe Kleine-König:
"This time around the pwm changes for the next release contain three
new drivers (loongson, mc33xs2410 and rzg2l-gpt) and the usual
collection of cleanups in both the core and drivers, support for new
variants in existing drivers, conversion of dt bindings to yaml and
documentation updates.

Thanks for contributions and reviews go to Alexey Charkov,
AngeloGioacchino Del Regno, Bartosz Golaszewski, Biju Das, Binbin
Zhou, Dan Carpenter, Dimitri Fedrau, Geert Uytterhoeven, George Stark,
Huacai Chen, Juxin Gao, Krzysztof Kozlowski, Kuninori Morimoto,
Laurent Pinchart, Neil Armstrong, Nuno Sá, Rob Herring, and Trevor
Gamblin"

* tag 'pwm/for-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux: (39 commits)
dt-bindings: timer: renesas,tpu: remove binding documentation
pwm: adp5585: make sure to include mod_devicetable.h
pwm: Tidyup PWM menu for Renesas
pwm: Restore alphabetic ordering in Kconfig and Makefile
pwm: Formally describe the procedure used to pick a hardware waveform setting
pwm: Let pwm_set_waveform_might_sleep() return 0 instead of 1 after rounding up
pwm: Let pwm_set_waveform_might_sleep() fail for exact but impossible requests
ARM: shmobile: defconfig: Enable more support for RZN1D-DB/EB
arm64: defconfig: Add Renesas MSIOF sound support
arm64: defconfig: Enable Renesas RZ/G2L GPT config
pwm: add support for NXPs high-side switch MC33XS2410
dt-bindings: pwm: add support for MC33XS2410
pwm: rzg2l-gpt: Accept requests for too high period length
dt-bindings: pwm: vt8500-pwm: Convert to YAML
dt-bindings: pwm: mediatek,pwm-disp: Add compatible for MT6893
pwm: Fix various formatting issues in kernel-doc
pwm: Add support for RZ/G2L GPT
dt-bindings: pwm: Add RZ/G2L GPT binding
pwm: Better document return value of pwm_round_waveform_might_sleep()
pwm: loongson: Fix an error code in probe()
...

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pwm: rzg2l-gpt: Accept requests for too high period length

The period setting is shared for each pair of PWM channels. So if the
twin channel is in use, the period must not be changed. According to

pwm: rzg2l-gpt: Accept requests for too high period length

The period setting is shared for each pair of PWM channels. So if the
twin channel is in use, the period must not be changed. According to the
usual practise to pick the next smaller possible period, accept a
request for a period that is bigger than the unchangable value.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250423095715.2952692-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>

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pwm: Add support for RZ/G2L GPT

RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
(GPT32E). It supports the following functions
* 32 bits x 8 channels
* Up-counting or down-c

pwm: Add support for RZ/G2L GPT

RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
(GPT32E). It supports the following functions
* 32 bits x 8 channels
* Up-counting or down-counting (saw waves) or up/down-counting
(triangle waves) for each counter.
* Clock sources independently selectable for each channel
* Two I/O pins per channel
* Two output compare/input capture registers per channel
* For the two output compare/input capture registers of each channel,
four registers are provided as buffer registers and are capable of
operating as comparison registers when buffering is not in use.
* In output compare operation, buffer switching can be at crests or
troughs, enabling the generation of laterally asymmetric PWM waveforms.
* Registers for setting up frame cycles in each channel (with capability
for generating interrupts at overflow or underflow)
* Generation of dead times in PWM operation
* Synchronous starting, stopping and clearing counters for arbitrary
channels
* Starting, stopping, clearing and up/down counters in response to input
level comparison
* Starting, clearing, stopping and up/down counters in response to a
maximum of four external triggers
* Output pin disable function by dead time error and detected
short-circuits between output pins
* A/D converter start triggers can be generated (GPT32E0 to GPT32E3)
* Enables the noise filter for input capture and external trigger
operation

Add basic pwm support for RZ/G2L GPT driver by creating separate
logical channels for each IOs.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250226144531.176819-4-biju.das.jz@bp.renesas.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>

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