| 73cb5f6e | 11-Dec-2025 |
Wentao Liang <vulab@iscas.ac.cn> |
pmdomain: imx: Fix reference count leak in imx_gpc_probe()
of_get_child_by_name() returns a node pointer with refcount incremented.
Use the __free() attribute to manage the pgc_node reference, ensur
pmdomain: imx: Fix reference count leak in imx_gpc_probe()
of_get_child_by_name() returns a node pointer with refcount incremented.
Use the __free() attribute to manage the pgc_node reference, ensuring
automatic of_node_put() cleanup when pgc_node goes out of scope.
This eliminates the need for explicit error handling paths and avoids
reference count leaks.
Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
Cc: stable@vger.kernel.org
Signed-off-by: Wentao Liang <vulab@iscas.ac.cn>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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|
| e2e4695f | 25-Nov-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: Respect the CPU system wakeup QoS limit for cpuidle
The CPU system wakeup QoS limit must be respected for the regular cpuidle
state selection. Therefore, let's extend the genpd governor fo
pmdomain: Respect the CPU system wakeup QoS limit for cpuidle
The CPU system wakeup QoS limit must be respected for the regular cpuidle
state selection. Therefore, let's extend the genpd governor for CPUs to
take the constraint into account when it selects a domain idle state for
the corresponding PM domain.
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Kevin Hilman (TI) <khilman@baylibre.com>
Tested-by: Kevin Hilman (TI) <khilman@baylibre.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://patch.msgid.link/20251125112650.329269-4-ulf.hansson@linaro.org
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
show more ...
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| 1f67707f | 24-Nov-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: Merge branch fixes into next
Merge the pmdomain fixes for v6.18-rc[n] into the next branch, to allow
them to get tested together with the new changes that are targeted for
v6.19.
Signed-o
pmdomain: Merge branch fixes into next
Merge the pmdomain fixes for v6.18-rc[n] into the next branch, to allow
them to get tested together with the new changes that are targeted for
v6.19.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| c98c99d5 | 21-Nov-2025 |
Jon Hunter <jonathanh@nvidia.com> |
pmdomain: tegra: Add GENPD_FLAG_NO_STAY_ON flag
Commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until
late_initcall_sync") kept power-domains on longer during boot which is
causing
pmdomain: tegra: Add GENPD_FLAG_NO_STAY_ON flag
Commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until
late_initcall_sync") kept power-domains on longer during boot which is
causing some GPU related tests to fail on Tegra234. While this is being
investigated, add the flag GENPD_FLAG_NO_STAY_ON for Tegra devices to
restore the previous behaviour to fix this.
Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 0346625c | 05-Nov-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: Extend the genpd governor for CPUs to account for IPIs
When the genpd governor for CPUs, tries to select the most optimal idle
state for a group of CPUs managed in a PM domain, it fails fa
pmdomain: Extend the genpd governor for CPUs to account for IPIs
When the genpd governor for CPUs, tries to select the most optimal idle
state for a group of CPUs managed in a PM domain, it fails far too often.
On a Dragonboard 410c, which is an arm64 based platform with 4 CPUs in one
cluster that is using PSCI OS-initiated mode, we can observe that we often
fail when trying to enter the selected idle state. This is certainly a
suboptimal behaviour that leads to many unnecessary requests being sent to
the PSCI FW.
A simple dd operation that reads from the eMMC, to generate some IRQs and
I/O handling helps us to understand the problem, while also monitoring the
rejected counters in debugfs for the corresponding idle states of the genpd
in question.
Menu governor:
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 1451 437 91 149 0
S1 65194 558 149 172 0
dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500
524288000 bytes (500.0MB) copied, 3.562698 seconds, 140.3MB/s
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 2694 1073 265 892 1
S1 74567 829 561 790 0
The dd completed in ~3.6 seconds and rejects increased with 586.
Teo governor:
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 4976 2096 392 1721 2
S1 160661 1893 1309 1904 0
dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500
524288000 bytes (500.0MB) copied, 3.543225 seconds, 141.1MB/s
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 5192 2194 433 1830 2
S1 167677 2891 3184 4729 0
The dd completed in ~3.6 seconds and rejects increased with 1916.
The main reason to the above problem is pending IPIs for one of the CPUs
that is affected by the idle state that the genpd governor selected. This
leads to that the PSCI FW refuses to enter it. To improve the behaviour,
let's start to take into account pending IPIs for CPUs in the genpd
governor, hence we fallback to use the shallower per CPU idle state.
Re-testing with this change shows a significant improved behaviour.
- Menu governor:
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 2556 878 19 368 1
S1 69974 596 10 152 0
dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500
524288000 bytes (500.0MB) copied, 3.522010 seconds, 142.0MB/s
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 3360 1320 28 819 1
S1 70168 710 11 267 0
The dd completed in ~3.5 seconds and rejects increased with 10.
- Teo governor
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 5145 1861 39 938 1
S1 188887 3117 51 1975 0
dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500
524288000 bytes (500.0MB) copied, 3.653100 seconds, 136.9MB/s
cat /sys/kernel/debug/pm_genpd/power-domain-cluster/idle_states
State Time Spent(ms) Usage Rejected Above Below
S0 5260 1923 42 1002 1
S1 190849 4033 52 2892 0
The dd completed in ~3.7 seconds and rejects increased with 4.
Note that, the rejected counters in genpd are also being accumulated in the
rejected counters that are managed by cpuidle, yet on a per CPU idle states
basis. Comparing these counters before/after this change, through cpuidle's
sysfs interface shows the similar improvements.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 80ed617a | 07-Nov-2025 |
Brian Masney <bmasney@redhat.com> |
pmdomain: mediatek: convert from clk round_rate() to determine_rate()
The round_rate() clk ops is deprecated in the clk framework in favor
of the determine_rate() clk ops, so let's convert this driv
pmdomain: mediatek: convert from clk round_rate() to determine_rate()
The round_rate() clk ops is deprecated in the clk framework in favor
of the determine_rate() clk ops, so let's convert this driver so that
round_rate() can be removed from the clk core.
Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
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| d4aa5960 | 31-Oct-2025 |
Stanimir Varbanov <svarbanov@suse.de> |
pmdomain: bcm: bcm2835-power: Prepare to support BCM2712
BCM2712 has a PM block but lacks asb and rpivid_asb register
spaces. To avoid unwanted results add a check for asb existence
during probe and
pmdomain: bcm: bcm2835-power: Prepare to support BCM2712
BCM2712 has a PM block but lacks asb and rpivid_asb register
spaces. To avoid unwanted results add a check for asb existence
during probe and also add a new register offset for bcm2712 to
control grafx_v3d power domain. The decision to use the new
register is implicit - if asb register base is null then the
driver is probed for bcm2712 (the other supported SoCs have
asb register space).
Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| b0671a5f | 30-Oct-2025 |
Nicolas Frattaroli <nicolas.frattaroli@collabora.com> |
pmdomain: mediatek: mtk-mfg: select MAILBOX in Kconfig
The mtk-mfg pmdomain driver calls common mailbox framework functions. If
the common mailbox framework is not selected in the kernel's
configura
pmdomain: mediatek: mtk-mfg: select MAILBOX in Kconfig
The mtk-mfg pmdomain driver calls common mailbox framework functions. If
the common mailbox framework is not selected in the kernel's
configuration, the build runs into a linker error, as the symbols are
absent.
The hardware mailbox Kconfig system, MAILBOX, has no dependencies of its
own. It's therefore safe to "select" it rather than use "depend on".
Declare this "select" dependency in the Kconfig for the driver.
Fixes: 1ff1f0db6aec ("pmdomain: mediatek: Add support for MFlexGraphics")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202510301311.TcOCnZ1s-lkp@intel.com/
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
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| f08e7a4e | 17-Oct-2025 |
Nicolas Frattaroli <nicolas.frattaroli@collabora.com> |
pmdomain: mediatek: Add support for MFlexGraphics
Various MediaTek SoCs use GPU integration silicon named "MFlexGraphics"
by MediaTek. On the MT8196 and MT6991 SoCs, interacting with this
integratio
pmdomain: mediatek: Add support for MFlexGraphics
Various MediaTek SoCs use GPU integration silicon named "MFlexGraphics"
by MediaTek. On the MT8196 and MT6991 SoCs, interacting with this
integration silicon is required to power on the GPU.
This glue silicon is in the form of an embedded microcontroller running
special-purpose firmware, which autonomously adjusts clocks and
regulators.
Implement a driver, modelled as a pmdomain driver with a
set_performance_state operation, to support these SoCs.
The driver also exposes the actual achieved clock rate, as read back
from the MCU, as common clock framework clocks, by acting as a clock
provider as well.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
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| 19e668e8 | 23-Oct-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: mediatek: Fix build-errors
Let's add the missing header to fix the reported build-errors.
Fixes: df4e9ec1ed86 ("pmdomain: mediatek: Add support for secure HWCCF infra power on")
Reported-
pmdomain: mediatek: Fix build-errors
Let's add the missing header to fix the reported build-errors.
Fixes: df4e9ec1ed86 ("pmdomain: mediatek: Add support for secure HWCCF infra power on")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202510231317.ZZxNaFG0-lkp@intel.com/
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 47c7b3c2 | 17-Oct-2025 |
Finley Xiao <finley.xiao@rock-chips.com> |
pmdomain: rockchip: Add support for RV1126B
Add configuration and power domains for RV1126 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
pmdomain: rockchip: Add support for RV1126B
Add configuration and power domains for RV1126 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 56b0d230 | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for MT8196 HFRPSYS power domains
Add support for the HFRPSYS Multimedia power domains found in the
MediaTek MT8196 Chromebook SoC.
Those power domains are all managed
pmdomain: mediatek: Add support for MT8196 HFRPSYS power domains
Add support for the HFRPSYS Multimedia power domains found in the
MediaTek MT8196 Chromebook SoC.
Those power domains are all managed by the Hardware Voter MCU.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 5437b281 | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for MT8196 SCPSYS power domains
Add a new SPM bus protection block and add support for both the
direct control and HW Voter control SCPSYS power domains found
in the
pmdomain: mediatek: Add support for MT8196 SCPSYS power domains
Add a new SPM bus protection block and add support for both the
direct control and HW Voter control SCPSYS power domains found
in the MT8196 and MT6991 SoCs.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 8e98bade | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for secure HWCCF infra power on
Some SoCs, like the MediaTek Dimensity 9400 (MT6991), have granular
power controls and will disable power to the infracfg to save powe
pmdomain: mediatek: Add support for secure HWCCF infra power on
Some SoCs, like the MediaTek Dimensity 9400 (MT6991), have granular
power controls and will disable power to the infracfg to save power
when the platform is in deeper sleep states (or when no IP in the
the infracfg macro-block is in use).
These chips also cannot control the infracfg power states directly
via AP register writes as those are protected by the secure world.
Add a new MTK_SCPD_INFRA_PWR_CTL cap and, if present, make a call
to the secure world to poweron the infracfg block, as the HWV IP
resides in there, when executing HWV domains power sequences.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 88914db0 | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for Hardware Voter power domains
New generation SoCs like MT8196/MT6991 feature a new type of power
domains, managed by a Hardware Voter (HWV) helper (through a SoC
i
pmdomain: mediatek: Add support for Hardware Voter power domains
New generation SoCs like MT8196/MT6991 feature a new type of power
domains, managed by a Hardware Voter (HWV) helper (through a SoC
internal fixed-function MCU): this is used to collect votes from
both the AP and the various other remote processors present in the
SoC and transparently power on/off various power domains, avoiding
unpowered access of registers in various internal IPs from all of
the integrated remote processors (or from the AP...!).
Add a new power domain type and differentiate between the old
SCPSYS_MTCMOS_TYPE_DIRECT_CTL - where power domains are controlled
directly by and exclusively from the Application Processor, and
the new SCPSYS_MTCMOS_TYPE_HW_VOTER, where the power domains are
voted through the HWV.
With the two needing different handling, check the power domain
type and assign a different power_{off,on} callback for pm_genpd:
for this specific reason, also move the check for the SCPD cap
MTK_SCPD_KEEP_DEFAULT_OFF after the assignment, and use the
assigned power_on function instead of calling scpsys_power_on()
directly to make that work for both HW_VOTER and DIRECT_CTL.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
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| 72b0a7b3 | 25-Sep-2025 |
Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> |
pmdomain: qcom: rpmhpd: Add RPMh power domain support for Kaanapali
Add the RPMh power domains present in Kaanapali SoCs. Also increase the
maximum allowed number of levels for ARC resources from 16
pmdomain: qcom: rpmhpd: Add RPMh power domain support for Kaanapali
Add the RPMh power domains present in Kaanapali SoCs. Also increase the
maximum allowed number of levels for ARC resources from 16 to 32, as
needed starting on the Kaanapali SoC where the ARC vote registers have been
expanded from 4 to 5 bits.
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| bbde1468 | 28-Oct-2025 |
Miaoqian Lin <linmq006@gmail.com> |
pmdomain: imx: Fix reference count leak in imx_gpc_remove
of_get_child_by_name() returns a node pointer with refcount incremented, we
should use of_node_put() on it when not needed anymore. Add the
pmdomain: imx: Fix reference count leak in imx_gpc_remove
of_get_child_by_name() returns a node pointer with refcount incremented, we
should use of_node_put() on it when not needed anymore. Add the missing
of_node_put() to avoid refcount leak.
Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
Cc: stable@vger.kernel.org
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
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| fccac54b | 27-Oct-2025 |
Marek Szyprowski <m.szyprowski@samsung.com> |
pmdomain: samsung: Rework legacy splash-screen handover workaround
Limit the workaround for the lack of the proper splash-screen handover
handling to the legacy ARM 32bit systems and replace forcing
pmdomain: samsung: Rework legacy splash-screen handover workaround
Limit the workaround for the lack of the proper splash-screen handover
handling to the legacy ARM 32bit systems and replace forcing a sync_state
by explicite power domain shutdown. This approach lets compiler to
optimize it out on newer ARM 64bit systems.
Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Fixes: 0745658aebbe ("pmdomain: samsung: Fix splash-screen handover by enforcing a sync_state")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 7458f72c | 17-Oct-2025 |
Sudeep Holla <sudeep.holla@arm.com> |
pmdomain: arm: scmi: Fix genpd leak on provider registration failure
If of_genpd_add_provider_onecell() fails during probe, the previously
created generic power domains are not removed, leading to a
pmdomain: arm: scmi: Fix genpd leak on provider registration failure
If of_genpd_add_provider_onecell() fails during probe, the previously
created generic power domains are not removed, leading to a memory leak
and potential kernel crash later in genpd_debug_add().
Add proper error handling to unwind the initialized domains before
returning from probe to ensure all resources are correctly released on
failure.
Example crash trace observed without this fix:
| Unable to handle kernel paging request at virtual address fffffffffffffc70
| CPU: 1 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.18.0-rc1 #405 PREEMPT
| Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform
| pstate: 00000005 (nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
| pc : genpd_debug_add+0x2c/0x160
| lr : genpd_debug_init+0x74/0x98
| Call trace:
| genpd_debug_add+0x2c/0x160 (P)
| genpd_debug_init+0x74/0x98
| do_one_initcall+0xd0/0x2d8
| do_initcall_level+0xa0/0x140
| do_initcalls+0x60/0xa8
| do_basic_setup+0x28/0x40
| kernel_init_freeable+0xe8/0x170
| kernel_init+0x2c/0x140
| ret_from_fork+0x10/0x20
Fixes: 898216c97ed2 ("firmware: arm_scmi: add device power domain support using genpd")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|